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authorNico Huber <nico.h@gmx.de>2018-11-11 01:42:17 +0100
committerNico Huber <nico.h@gmx.de>2018-11-21 22:49:48 +0000
commit755db95d1a36a4bd64519d7e05b00d62e848c458 (patch)
tree301582945323865890ae28e54ab8725592690618 /src/mainboard/google/gru
parent7470c902d80d04730ac1147336339cc057db1be9 (diff)
downloadcoreboot-755db95d1a36a4bd64519d7e05b00d62e848c458.tar.xz
(console,drivers/uart)/Kconfig: Fix dependencies
The dependencies of CONSOLE_SERIAL and DRIVERS_UART were somehow backwards. Fix that. Now, CONSOLE_SERIAL depends on DRIVERS_UART, because it's using its interface. The individual UART drivers select DRIVERS_UART, because they implement the interface and depend on the common UART code. Some guards had to be fixed (using CONSOLE_SERIAL now instead of DRIVERS_UART). Some other guards that were only about compilation of units were removed. We want to build test as much as possible, right? Change-Id: I0ea73a8909f07202b23c88db93df74cf9dc8abf9 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/29572 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/gru')
-rw-r--r--src/mainboard/google/gru/bootblock.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c
index 0013414bf5..b2f7d57691 100644
--- a/src/mainboard/google/gru/bootblock.c
+++ b/src/mainboard/google/gru/bootblock.c
@@ -49,16 +49,16 @@ void bootblock_mainboard_early_init(void)
if (!IS_ENABLED(CONFIG_GRU_BASEBOARD_SCARLET))
gpio_output(GPIO_P15V_EN, 1); /* Scarlet: EC-controlled */
-#if IS_ENABLED(CONFIG_DRIVERS_UART)
- _Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE,
- "CONSOLE_SERIAL_UART should be UART2");
+ if (IS_ENABLED(CONFIG_CONSOLE_SERIAL)) {
+ _Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE,
+ "CONSOLE_SERIAL_UART should be UART2");
- /* iomux: select gpio4c[4:3] as uart2 dbg port */
- write32(&rk3399_grf->iomux_uart2c, IOMUX_UART2C);
+ /* iomux: select gpio4c[4:3] as uart2 dbg port */
+ write32(&rk3399_grf->iomux_uart2c, IOMUX_UART2C);
- /* grf soc_con7[11:10] use for uart2 select */
- write32(&rk3399_grf->soc_con7, UART2C_SEL);
-#endif
+ /* grf soc_con7[11:10] use for uart2 select */
+ write32(&rk3399_grf->soc_con7, UART2C_SEL);
+ }
}
static void configure_spi_flash(void)