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authorMatt DeVillier <matt.devillier@gmail.com>2015-11-03 23:20:10 -0600
committerMartin Roth <martinroth@google.com>2016-01-12 22:20:28 +0100
commit8e6b0a2ae25176028615aa45c0b8e341ff622a61 (patch)
tree2fa5a4852771d817f80a04e95acc20586bada790 /src/mainboard/google/guado/onboard.h
parent2de6410eeefb65729662ad7604e6a9620b9c58bf (diff)
downloadcoreboot-8e6b0a2ae25176028615aa45c0b8e341ff622a61.tar.xz
google/guado: initial upstream migration
Migrate google/guado (Asus Chromebox CN62) from Chromium tree to upstream, using google/auron and google/panther as refs. TEST=built and booted guado with full functionality Change-Id: If7a500fb408197a61c9619b9d5ea1458d1f4d702 Tested-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/12800 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
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diff --git a/src/mainboard/google/guado/onboard.h b/src/mainboard/google/guado/onboard.h
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+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef ONBOARD_H
+#define ONBOARD_H
+
+#ifndef __ACPI__
+void lan_init(void);
+#endif
+
+/* defines for programming the MAC address */
+#define GUADO_NIC_VENDOR_ID 0x10EC
+#define GUADO_NIC_DEVICE_ID 0x8168
+
+/* 0x00: White LINK LED and Amber ACTIVE LED */
+#define GUADO_NIC_LED_MODE 0x00
+
+/* NIC wake is GPIO 8 */
+#define GUADO_NIC_WAKE_GPIO 8
+
+/* WLAN wake is GPIO 10 */
+#define GUADO_WLAN_WAKE_GPIO 10
+
+/* IT8772F defs */
+#define IT8772F_BASE 0x2e
+#define IT8772F_SERIAL_DEV PNP_DEV(IT8772F_BASE, IT8772F_SP1)
+#define IT8772F_GPIO_DEV PNP_DEV(IT8772F_BASE, IT8772F_GPIO)
+#define IT8772F_DUMMY_DEV PNP_DEV(IT8772F_BASE, 0)
+
+#endif