diff options
| author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2018-12-28 13:44:59 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-24 13:52:15 +0000 |
| commit | 6225a677406a81990498aaf48a486a5bcad0d1fd (patch) | |
| tree | 86515155b31cc563819c849e860b8b9588a56bc5 /src/mainboard/google/hatch/variants/baseboard/gpio.c | |
| parent | 3748aae7d6118fed531fe94b94977760b164821b (diff) | |
| download | coreboot-6225a677406a81990498aaf48a486a5bcad0d1fd.tar.xz | |
mb/google/hatch: Enable PCIe WLAN and BT
Enable PCIe WLAN for hatch
1. Enable PCI port 14 for PCIe WLAN
2. Enable CLKREQ, CLK SRC 3 for PCI port 14
3. GPIO pad config for WLAN and BT
USB port for BT has already been enabled so not included in this patch
BUG=b:120914069
BRANCH=none
TEST=check if code compiles correctly and verify GPIO configuration with
schematics
Change-Id: I4f2a6eb37a467ad8b8cdde8fe6b657fabb383b04
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/30467
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants/baseboard/gpio.c')
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/gpio.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index b40ebd4c8a..3e73d95549 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -27,6 +27,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI_APIC(GPP_A21, NONE, PLTRST, LEVEL, INVERT), /* SRCCLKREQ1 */ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), + /* PCIE_14_WLAN_CLKREQ_ODL */ + PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CS_L */ PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CLK */ @@ -37,10 +39,14 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1), /* TOUCHSCREEN_DIS_L */ PAD_CFG_GPO(GPP_C4, 0, DEEP), - /* GPP_C11_TP => NC */ - PAD_NC(GPP_C11, DN_20K), - /* GPP_C10_TP => NC */ + /* PCIE_14_WLAN_WAKE_ODL */ + PAD_CFG_GPI_SCI_LOW(GPP_C1, NONE, DEEP, EDGE_SINGLE), + /* GPP_C10_TP */ PAD_NC(GPP_C10, DN_20K), + /* GPP_C11_TP */ + PAD_NC(GPP_C11, DN_20K), + /* BT_DISABLE_L */ + PAD_CFG_GPO(GPP_C14, 1, DEEP), /* PCH_I2C_TRACKPAD_SDA */ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* PCH_I2C_TRACKPAD_SCL */ @@ -55,6 +61,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI_APIC(GPP_C21, NONE, DEEP, LEVEL, INVERT), /* EC_IN_RW_OD */ PAD_CFG_GPI(GPP_C22, NONE, DEEP), + /* WLAN_PE_RST# */ + PAD_CFG_GPO(GPP_C23, 1, DEEP), /* TOUCHSCREEN_RST_L */ PAD_CFG_GPO(GPP_D15, 0, DEEP), /* TOUCHSCREEN_INT_L */ @@ -135,6 +143,8 @@ static const struct pad_config early_gpio_table[] = { PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1), /* H1_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_C21, NONE, DEEP, LEVEL, INVERT), + /* WLAN_PE_RST# */ + PAD_CFG_GPO(GPP_C23, 1, DEEP), }; const struct pad_config *__weak variant_early_gpio_table(size_t *num) |