diff options
| author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2018-12-31 12:12:36 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-01-23 12:24:23 +0000 |
| commit | e4fcc3ba2c3054d0c1fd097b70fc4f68b655ce6b (patch) | |
| tree | 5e7684d29c58d3150fe005ad3bb45192041e60f2 /src/mainboard/google/hatch/variants/baseboard/gpio.c | |
| parent | ec576d1c978a3d2f7f4eee12eda660aec18c0b2c (diff) | |
| download | coreboot-e4fcc3ba2c3054d0c1fd097b70fc4f68b655ce6b.tar.xz | |
mb/google/hatch: Enable SD card support for hatch
Enable support for SD card support for hatch
1. Enable PCI device for SD and also configure SD detect GPIO
2. Configure SD card related GPIOs in gpio.c
BUG=b:120914069
BRANCH=none
TEST=Verify GPIO configuration with schematics
Change-Id: I8ccaa28323b1e1fcc192e245347a96309227660b
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/30545
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants/baseboard/gpio.c')
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/gpio.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index e855fed9ff..b40ebd4c8a 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -19,6 +19,10 @@ #include <commonlib/helpers.h> static const struct pad_config gpio_table[] = { + /* SD_1P8_SEL => NC */ + PAD_NC(GPP_A16, DN_20K), + /* EN_PP3300_SD_DX */ + PAD_CFG_NF(GPP_A17, NONE, DEEP, NF1), /* TRACKPAD_INT_ODL */ PAD_CFG_GPI_APIC(GPP_A21, NONE, PLTRST, LEVEL, INVERT), /* SRCCLKREQ1 */ @@ -95,6 +99,22 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPP_F11, NONE, PLTRST), /* PCH_MEM_STRAP3 */ PAD_CFG_GPI(GPP_F22, NONE, PLTRST), + /* SD_CMD */ + PAD_CFG_NF(GPP_G0, NONE, DEEP, NF1), + /* SD_DATA0 */ + PAD_CFG_NF(GPP_G1, NONE, DEEP, NF1), + /* SD_DATA1 */ + PAD_CFG_NF(GPP_G2, NONE, DEEP, NF1), + /* SD_DATA2 */ + PAD_CFG_NF(GPP_G3, NONE, DEEP, NF1), + /* SD_DATA3 */ + PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1), + /* SD_CD# */ + PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1), + /* SD_CLK */ + PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1), + /* SD_WP => NC */ + PAD_NC(GPP_G7, DN_20K), }; const struct pad_config *__weak variant_gpio_table(size_t *num) |