diff options
| author | Philip Chen <philipchen@google.com> | 2019-04-29 10:18:24 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-15 17:47:13 +0000 |
| commit | 0d4200fef396fb0d1fbf28b4ced475fbf59b5b85 (patch) | |
| tree | 4cfd6a29afa5062c4bb125320657e7b54f6f002c /src/mainboard/google/hatch/variants/baseboard/include | |
| parent | 72f6fbb1bc64a68dab121231b186c803e9836ad7 (diff) | |
| download | coreboot-0d4200fef396fb0d1fbf28b4ced475fbf59b5b85.tar.xz | |
soc/intel/cannonlake: Support different SPD read type for each slot
Also clean up cannonlake_memcfg_init.
The major changes include:
(1) Add enum 'mem_info_read_type' to spd_info.
(2) Add per-dimm-slot spd_info to cnl_mb_cfg.
(3) Setup memory config for each slot independently.
(4) Squash meminit_memcfg_spd().
BUG=chromium:960581, b:124990009
BRANCH=none
TEST=boot hatch, hatch_whl, and kohaku
Change-Id: I686a85996858204c20fd05ef24787a0487817c34
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32513
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants/baseboard/include')
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h | 7 | ||||
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h | 3 |
2 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h index 5d6311ba24..e83732cb62 100644 --- a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h @@ -22,13 +22,6 @@ #define GPIO_PCH_WP GPP_C20 -/* Memory configuration board straps */ -#define GPIO_MEM_CONFIG_0 GPP_F20 -#define GPIO_MEM_CONFIG_1 GPP_F21 -#define GPIO_MEM_CONFIG_2 GPP_F11 -#define GPIO_MEM_CONFIG_3 GPP_F22 - - /* EC wake pin is LAN_WAKE# */ #define GPE_EC_WAKE GPE0_LAN_WAK diff --git a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h index d41ad536f2..17bd5df63d 100644 --- a/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h @@ -31,9 +31,6 @@ const struct pad_config *base_early_gpio_table(size_t *num); const struct pad_config *override_gpio_table(size_t *num); const struct pad_config *override_early_gpio_table(size_t *num); -/* Return memory SKU for the board. */ -int variant_memory_sku(void); - /* Return board specific memory configuration */ void variant_memory_params(struct cnl_mb_cfg *bcfg); |