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| author | Kane Chen <kane_chen@pegatron.corp-partner.google.com> | 2019-10-04 18:39:03 +0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2019-10-30 16:58:26 +0000 |
| commit | 10af2af81fbf102d3f68fbf4f47364978f59e8ab (patch) | |
| tree | 8d1164aa729cf0e10322f350574af37fb5b50918 /src/mainboard/google/hatch/variants/helios/overridetree.cb | |
| parent | ff744bf0eee875a03dc98dd6792e3ed0ff4456a0 (diff) | |
| download | coreboot-10af2af81fbf102d3f68fbf4f47364978f59e8ab.tar.xz | |
mb/google/hatch/variants/helios: Modify DPTF parameters
Modify DPTF parameters.
Modify TDP PL1 values to 15.
Remove TCHG Level 3 - 0.5A.
BUG=b:131272830
BRANCH=none
TEST=emerge-hatch coreboot chromeos-bootimage
Signed-off-by: YenLu Chen <kane_chen@pegatron.corp-partner.google.com>
Change-Id: I0e5c079856a167b1c2ef52e446d055404e565858
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35794
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/hatch/variants/helios/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/hatch/variants/helios/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb index 2434dfff2a..262ae8d607 100644 --- a/src/mainboard/google/hatch/variants/helios/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb @@ -1,5 +1,5 @@ chip soc/intel/cannonlake - register "tdp_pl1_override" = "13" + register "tdp_pl1_override" = "15" register "tdp_pl2_override" = "64" register "SerialIoDevMode" = "{ |