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author | Frank_Chu <frank_chu@pegatron.corp-partner.google.com> | 2019-08-06 17:37:15 +0800 |
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committer | Furquan Shaikh <furquan@google.com> | 2019-09-06 07:01:00 +0000 |
commit | 1b439d9ceddb1ee7383c4cc69b272fc70acb3810 (patch) | |
tree | d2375c13002d60aaecb8fb9f209ee87d018b2212 /src/mainboard/google/hatch/variants/helios/overridetree.cb | |
parent | 5e2a2cd5e7428543051418a078ffc77585ef42fb (diff) | |
download | coreboot-1b439d9ceddb1ee7383c4cc69b272fc70acb3810.tar.xz |
mb/google/hatch/variants/helios: Update DPTF parameters and TDP PL1/PL2
Applying first tuned DPTF parameters and TDP PL1/PL2 values for helios.
BUG=b:138752455
BRANCH=none
TEST=emerge-hatch coreboot chromeos-bootimage
Signed-off-by: Frank_Chu <frank_chu@pegatron.corp-partner.google.com>
Change-Id: Ic7a96c33ce710c32b57e2ad8066830ff83398c57
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34743
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants/helios/overridetree.cb')
-rw-r--r-- | src/mainboard/google/hatch/variants/helios/overridetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/helios/overridetree.cb b/src/mainboard/google/hatch/variants/helios/overridetree.cb index 71e4856f38..b3da8c9181 100644 --- a/src/mainboard/google/hatch/variants/helios/overridetree.cb +++ b/src/mainboard/google/hatch/variants/helios/overridetree.cb @@ -1,4 +1,7 @@ chip soc/intel/cannonlake + register "tdp_pl1_override" = "13" + register "tdp_pl2_override" = "64" + register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, |