summaryrefslogtreecommitdiff
path: root/src/mainboard/google/hatch/variants/kohaku/Makefile.inc
diff options
context:
space:
mode:
authorPaul Fagerburg <pfagerburg@chromium.org>2019-04-18 16:52:06 -0600
committerFurquan Shaikh <furquan@google.com>2019-04-29 03:47:29 +0000
commitd3d41b348d2af281c08529e7ba7832dca44d4ca9 (patch)
treef27cd0e6a5f6efec6991f53943da5871090d1f41 /src/mainboard/google/hatch/variants/kohaku/Makefile.inc
parentcb42f4d467846f4b7e0b1dd5ce5f32c4c33e2ff9 (diff)
downloadcoreboot-d3d41b348d2af281c08529e7ba7832dca44d4ca9.tar.xz
mb/google/hatch/variants/kohaku: Add support for LPDDR3 configurations
First configuration supported is 8 GB system memory: 4 x 2 GB (K4E6E304ED-EGCG). BRANCH=none BUG=b:129706819 TEST=ensure the firmware builds without error; I don't have hardware available to test this just yet. Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: Ibd92d585118ff75492e8a7188dcdb2a286836d56 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32364 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants/kohaku/Makefile.inc')
-rw-r--r--src/mainboard/google/hatch/variants/kohaku/Makefile.inc9
1 files changed, 3 insertions, 6 deletions
diff --git a/src/mainboard/google/hatch/variants/kohaku/Makefile.inc b/src/mainboard/google/hatch/variants/kohaku/Makefile.inc
index 2f590bf026..9cdff32074 100644
--- a/src/mainboard/google/hatch/variants/kohaku/Makefile.inc
+++ b/src/mainboard/google/hatch/variants/kohaku/Makefile.inc
@@ -12,12 +12,9 @@
## GNU General Public License for more details.
##
-SPD_SOURCES = 4G_2400 # 0b000
-SPD_SOURCES += empty_ddr4 # 0b001
-SPD_SOURCES += 8G_2400 # 0b010
-SPD_SOURCES += 8G_2666 # 0b011
-SPD_SOURCES += 16G_2400 # 0b100
-SPD_SOURCES += 16G_2666 # 0b101
+SPD_SOURCES = LP_8G_2133 # 0b000
+
+romstage-y += memory.c
bootblock-y += gpio.c
ramstage-y += gpio.c