diff options
| author | Philip Chen <philipchen@google.com> | 2019-06-18 12:48:34 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-06-21 08:47:07 +0000 |
| commit | 3970a9d9645f265c34353ba24c0c436b02e69838 (patch) | |
| tree | 8f5bf82254843ab0be34c5db8c71bd069e536491 /src/mainboard/google/hatch/variants | |
| parent | f70cb8bf968af75669325104756464ce6f4b824b (diff) | |
| download | coreboot-3970a9d9645f265c34353ba24c0c436b02e69838.tar.xz | |
mb/google/hatch: Do not pull down GPP_F2 internally
There is already an external pull-up/down resistor tied to
this pin to identify if the board is single-channel or
dual-channel memory SKU.
BUG=b:135496271
BRANCH=none
TEST=build
Signed-off-by: Philip Chen <philipchen@google.com>
Change-Id: Ie218657fd9dde113ab26cf5551d1dff1b6e392b6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33583
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants')
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/gpio.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index 0b6607595d..e309175d03 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -284,7 +284,7 @@ static const struct pad_config gpio_table[] = { /* F1 : WWAN_RESET_1V8_ODL */ PAD_CFG_GPO(GPP_F1, 1, DEEP), /* F2 : MEM_CH_SEL */ - PAD_CFG_GPI(GPP_F2, DN_20K, PLTRST), + PAD_CFG_GPI(GPP_F2, NONE, PLTRST), /* F3 : GPP_F3 ==> NC */ PAD_NC(GPP_F3, NONE), /* F4 : CNV_BRI_DT */ @@ -460,7 +460,7 @@ static const struct pad_config early_gpio_table[] = { /* C23 : WLAN_PE_RST# */ PAD_CFG_GPO(GPP_C23, 1, DEEP), /* F2 : MEM_CH_SEL */ - PAD_CFG_GPI(GPP_F2, DN_20K, PLTRST), + PAD_CFG_GPI(GPP_F2, NONE, PLTRST), /* F11 : PCH_MEM_STRAP2 */ PAD_CFG_GPI(GPP_F11, NONE, PLTRST), /* F20 : PCH_MEM_STRAP0 */ |