diff options
| author | Sam McNally <sammc@chromium.org> | 2020-01-24 13:53:17 +1100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-01-27 07:43:27 +0000 |
| commit | dd80b5c7a15ed5d4dd3ca88d4e0a4dbe5221249c (patch) | |
| tree | 23df6358cc5ce25e757ac30654de67089b000ff1 /src/mainboard/google/hatch | |
| parent | f74b6e351c921f2505691f5ece834b280e500395 (diff) | |
| download | coreboot-dd80b5c7a15ed5d4dd3ca88d4e0a4dbe5221249c.tar.xz | |
mainboard/google/hatch: Set GPP_C7 as the wake pin for the NIC on Puff
BUG=b:148252157
BRANCH=none
TEST=Put a puff in s0ix, send a WoL magic packet.
Change-Id: I4a08a2f5505d00909c9301315fcf72f687141f91
Signed-off-by: Sam McNally <sammc@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38553
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'src/mainboard/google/hatch')
| -rw-r--r-- | src/mainboard/google/hatch/variants/puff/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb index 456e6661a1..45d05d0928 100644 --- a/src/mainboard/google/hatch/variants/puff/overridetree.cb +++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb @@ -270,6 +270,7 @@ chip soc/intel/cannonlake device pci 1c.0 on chip drivers/net register "customized_leds" = "0x05af" + register "wake" = "GPE0_DW1_07" # GPP_C7 device pci 00.0 on end end end # FSP requires func0 be enabled. |