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authorFelix Singer <felix.singer@secunet.com>2020-08-04 16:47:10 +0200
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-08-07 20:35:29 +0000
commit3de90d134494203556a81c47a6640ae101674114 (patch)
tree85ec6d856aeba4da218ea3ae5038565eab6bbd89 /src/mainboard/google/hatch
parentb7594b09b597075b3072e12c8338ca0cee66c006 (diff)
downloadcoreboot-3de90d134494203556a81c47a6640ae101674114.tar.xz
soc/intel/cnl: Set Heci1Disable depending on devicetree config
Currently HECI1 gets enabled by the option HeciEnabled, but this duplicates the devicetree on/off options. Therefore use the on/off options for the enablement/disablement of the HECI1 device. All corresponding mainboards were checked if the devicetree matches the HeciEnabled setting, and adjusted where necessary. Change-Id: I03dd3577fbe3f68b0abc2d196d016a4d26d88ce5 Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
Diffstat (limited to 'src/mainboard/google/hatch')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb4
-rw-r--r--src/mainboard/google/hatch/variants/duffy/overridetree.cb3
-rw-r--r--src/mainboard/google/hatch/variants/faffy/overridetree.cb3
-rw-r--r--src/mainboard/google/hatch/variants/kaisa/overridetree.cb3
-rw-r--r--src/mainboard/google/hatch/variants/noibat/overridetree.cb3
-rw-r--r--src/mainboard/google/hatch/variants/puff/overridetree.cb3
-rw-r--r--src/mainboard/google/hatch/variants/wyvern/overridetree.cb3
7 files changed, 7 insertions, 15 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index cb314ab6a2..a12b71cfbd 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -29,8 +29,6 @@ chip soc/intel/cannonlake
register "satapwroptimize" = "1"
# Enable System Agent dynamic frequency
register "SaGv" = "SaGv_Enabled"
- # Enable heci communication
- register "HeciEnabled" = "0"
# Enable Speed Shift Technology support
register "speed_shift_enable" = "1"
# Enable S0ix
@@ -312,7 +310,7 @@ chip soc/intel/cannonlake
device pci 15.1 on end # I2C #1
device pci 15.2 on end # I2C #2
device pci 15.3 on end # I2C #3
- device pci 16.0 on end # Management Engine Interface 1
+ device pci 16.0 off end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT Redirection
diff --git a/src/mainboard/google/hatch/variants/duffy/overridetree.cb b/src/mainboard/google/hatch/variants/duffy/overridetree.cb
index 2f2b643951..7f75c78e26 100644
--- a/src/mainboard/google/hatch/variants/duffy/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/duffy/overridetree.cb
@@ -1,6 +1,4 @@
chip soc/intel/cannonlake
- # Enable heci communication
- register "HeciEnabled" = "1"
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"
@@ -369,6 +367,7 @@ chip soc/intel/cannonlake
device i2c 4a on end
end
end # I2C #3, Realtek RTD2142.
+ device pci 16.0 on end # Management Engine Interface 1
device pci 19.0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
diff --git a/src/mainboard/google/hatch/variants/faffy/overridetree.cb b/src/mainboard/google/hatch/variants/faffy/overridetree.cb
index 8aff8d192d..c1c44a69e9 100644
--- a/src/mainboard/google/hatch/variants/faffy/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/faffy/overridetree.cb
@@ -1,6 +1,4 @@
chip soc/intel/cannonlake
- # Enable heci communication
- register "HeciEnabled" = "1"
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"
@@ -376,6 +374,7 @@ chip soc/intel/cannonlake
device i2c 4a on end
end
end # I2C #3, Realtek RTD2142.
+ device pci 16.0 on end # Management Engine Interface 1
device pci 19.0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
diff --git a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
index 01691ff16c..67e62e7d08 100644
--- a/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kaisa/overridetree.cb
@@ -1,6 +1,4 @@
chip soc/intel/cannonlake
- # Enable heci communication
- register "HeciEnabled" = "1"
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"
@@ -369,6 +367,7 @@ chip soc/intel/cannonlake
device i2c 4a on end
end
end # I2C #3, Realtek RTD2142.
+ device pci 16.0 on end # Management Engine Interface 1
device pci 19.0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
diff --git a/src/mainboard/google/hatch/variants/noibat/overridetree.cb b/src/mainboard/google/hatch/variants/noibat/overridetree.cb
index cac7516000..2de90ec8e2 100644
--- a/src/mainboard/google/hatch/variants/noibat/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/noibat/overridetree.cb
@@ -1,6 +1,4 @@
chip soc/intel/cannonlake
- # Enable heci communication
- register "HeciEnabled" = "1"
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"
@@ -284,6 +282,7 @@ chip soc/intel/cannonlake
device i2c 4a on end
end
end # I2C #3, Realtek RTD2142.
+ device pci 16.0 on end # Management Engine Interface 1
device pci 19.0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb
index c78364dc9e..7ead982c08 100644
--- a/src/mainboard/google/hatch/variants/puff/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb
@@ -1,6 +1,4 @@
chip soc/intel/cannonlake
- # Enable heci communication
- register "HeciEnabled" = "1"
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"
@@ -308,6 +306,7 @@ chip soc/intel/cannonlake
device i2c 4a on end
end
end # I2C #3, Realtek RTD2142.
+ device pci 16.0 on end # Management Engine Interface 1
device pci 19.0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""
diff --git a/src/mainboard/google/hatch/variants/wyvern/overridetree.cb b/src/mainboard/google/hatch/variants/wyvern/overridetree.cb
index c394977f6e..d7b2298a06 100644
--- a/src/mainboard/google/hatch/variants/wyvern/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/wyvern/overridetree.cb
@@ -1,6 +1,4 @@
chip soc/intel/cannonlake
- # Enable heci communication
- register "HeciEnabled" = "1"
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"
@@ -303,6 +301,7 @@ chip soc/intel/cannonlake
device i2c 4a on end
end
end # I2C #3, Realtek RTD2142.
+ device pci 16.0 on end # Management Engine Interface 1
device pci 19.0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""