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authorSam McNally <sammc@chromium.org>2020-10-11 10:38:07 +1100
committerEdward O'Callaghan <quasisec@chromium.org>2020-10-12 08:27:37 +0000
commitd0aa999b576d2d778d5d7ac282370db45a54dcfd (patch)
tree89b6a49b15d8e906aafdcb603108fa481e3e5064 /src/mainboard/google/hatch
parent16e410669a369c4f09560cff99787e5439cd5e50 (diff)
downloadcoreboot-d0aa999b576d2d778d5d7ac282370db45a54dcfd.tar.xz
mb/google/puff: Enable SATA0 on wyvern
A SATA drive may be connected to SATA0. BUG=b:162909831 BRANCH=puff TEST=none Change-Id: I2a4ce2f89fa6d786358e01add15f2eedfbe4b20f Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'src/mainboard/google/hatch')
-rw-r--r--src/mainboard/google/hatch/variants/wyvern/overridetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/wyvern/overridetree.cb b/src/mainboard/google/hatch/variants/wyvern/overridetree.cb
index 3320455ae3..8ca9ce4683 100644
--- a/src/mainboard/google/hatch/variants/wyvern/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/wyvern/overridetree.cb
@@ -3,6 +3,8 @@ chip soc/intel/cannonlake
# Auto-switch between X4 NVMe and X2 NVMe.
register "TetonGlacierMode" = "1"
+ register "SataPortsEnable[0]" = "1"
+
register "SerialIoDevMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoDisabled,
[PchSerialIoIndexI2C1] = PchSerialIoDisabled,