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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-11-28 13:53:15 +0100 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2018-11-30 22:02:35 +0000 |
| commit | aaced4a932dc68268cebace63df079673960c17b (patch) | |
| tree | bf948f7b699b3d954ea65d95a60cf901d8f75d9e /src/mainboard/google/jecht/dsdt.asl | |
| parent | cf9fc1ddfebffc76eaf86aae9ae8afbe9ab5925d (diff) | |
| download | coreboot-aaced4a932dc68268cebace63df079673960c17b.tar.xz | |
cpu/intel/common: Use a common acpi/cpu.asl file
Change-Id: Ifa5a3a22771ff2e0efa14fb765603fd5e0440d59
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29894
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: David Guckian
Diffstat (limited to 'src/mainboard/google/jecht/dsdt.asl')
| -rw-r--r-- | src/mainboard/google/jecht/dsdt.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/jecht/dsdt.asl b/src/mainboard/google/jecht/dsdt.asl index db09dc0231..e216b132a9 100644 --- a/src/mainboard/google/jecht/dsdt.asl +++ b/src/mainboard/google/jecht/dsdt.asl @@ -37,7 +37,7 @@ DefinitionBlock( //#include "acpi/gpe.asl" // CPU - #include <soc/intel/broadwell/acpi/cpu.asl> + #include <cpu/intel/common/acpi/cpu.asl> Scope (\_SB) { Device (PCI0) |