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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-05-12 13:47:35 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-05-14 23:22:51 +0000 |
| commit | 97e9e5622df8b2386b2828da2671018232056035 (patch) | |
| tree | de48c5186bff27002bb68f14b41f968349bb93b2 /src/mainboard/google/jecht | |
| parent | 325865db5683f32d846cc452504da00ec8d53710 (diff) | |
| download | coreboot-97e9e5622df8b2386b2828da2671018232056035.tar.xz | |
soc/intel/broadwell: Clean up the bootflow
Call the raminit from a common location instead of from the mainboard
specific code.
Change-Id: I65d522237a0bb7b2c032536ede10e2cf93c134d8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32760
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/jecht')
| -rw-r--r-- | src/mainboard/google/jecht/romstage.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/mainboard/google/jecht/romstage.c b/src/mainboard/google/jecht/romstage.c index 8d1ae8aca2..86888c82f8 100644 --- a/src/mainboard/google/jecht/romstage.c +++ b/src/mainboard/google/jecht/romstage.c @@ -27,17 +27,15 @@ #include "onboard.h" -void mainboard_romstage_entry(struct romstage_params *rp) +void mainboard_pre_raminit(struct romstage_params *rp) { - post_code(0x32); - /* Fill out PEI DATA */ mainboard_fill_pei_data(&rp->pei_data); mainboard_fill_spd_data(&rp->pei_data); +} - /* Call into the real romstage main with this board's attributes. */ - romstage_common(rp); - +void mainboard_post_raminit(struct romstage_params *rp) +{ if (CONFIG(CHROMEOS)) init_bootmode_straps(); } |