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author | Marc Jones <marcj303@gmail.com> | 2017-05-22 21:35:16 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2017-07-27 21:31:32 +0000 |
commit | 2d79f16dc81037620ead4e3b49eb470726aec3f2 (patch) | |
tree | b19cf32c5c2ac9d7104231953cb76ba71f8d981d /src/mainboard/google/kahlee/BiosCallOuts.c | |
parent | b14e04bd7c492a551532dc3678a1cc922b3cedf8 (diff) | |
download | coreboot-2d79f16dc81037620ead4e3b49eb470726aec3f2.tar.xz |
google/kahlee: Start Kahlee mainboard
Copied from amd/gardenia. Update the appropriate board name strings.
Uses the soc/ structure.
Change-Id: Ia68b16969518f4d63d5d2dea7658a472b2daca05
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19830
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/kahlee/BiosCallOuts.c')
-rw-r--r-- | src/mainboard/google/kahlee/BiosCallOuts.c | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/BiosCallOuts.c b/src/mainboard/google/kahlee/BiosCallOuts.c new file mode 100644 index 0000000000..fd03f4e3fa --- /dev/null +++ b/src/mainboard/google/kahlee/BiosCallOuts.c @@ -0,0 +1,78 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015-2016 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <AGESA.h> +#include <BiosCallOuts.h> +#include <FchPlatform.h> +#include <soc/imc.h> +#include <soc/hudson.h> +#include <stdlib.h> + +static AGESA_STATUS fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr) +{ + AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; + + if (StdHeader->Func == AMD_INIT_ENV) { + FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData; + printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); + if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)) + oem_fan_control(FchParams_env); + + /* XHCI configuration */ + if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE)) + FchParams_env->Usb.Xhci0Enable = TRUE; + else + FchParams_env->Usb.Xhci0Enable = FALSE; + FchParams_env->Usb.Xhci1Enable = FALSE; + /* 8: If USB3 port is unremoveable. */ + FchParams_env->Usb.USB30PortInit = 8; + + /* SATA configuration */ + FchParams_env->Sata.SataClass = CONFIG_STONEYRIDGE_SATA_MODE; + switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) { + case SataRaid: + case SataAhci: + case SataAhci7804: + case SataLegacyIde: + FchParams_env->Sata.SataIdeMode = FALSE; + break; + case SataIde2Ahci: + case SataIde2Ahci7804: + default: /* SataNativeIde */ + FchParams_env->Sata.SataIdeMode = TRUE; + break; + } + printk(BIOS_DEBUG, "Done\n"); + } + + return AGESA_SUCCESS; +} + +const BIOS_CALLOUT_STRUCT BiosCallouts[] = { + {AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer }, + {AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer }, + {AGESA_LOCATE_BUFFER, agesa_LocateBuffer }, + {AGESA_READ_SPD, agesa_ReadSpd }, + {AGESA_DO_RESET, agesa_Reset }, + {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, + {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, + {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, + {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, + {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, + {AGESA_FCH_OEM_CALLOUT, fch_initenv }, + {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage } +}; + +const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); |