diff options
| author | Martin Roth <martinroth@google.com> | 2017-10-02 13:46:50 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-10-20 17:48:37 +0000 |
| commit | c450fbe909e7ed1bc8309ace60ad45fc65a208e1 (patch) | |
| tree | 0cc2ab84880902aa015517776b43c0fa5bec7368 /src/mainboard/google/kahlee/bootblock | |
| parent | 44aaf6137d0e000d6a83ca036aad5722b485d716 (diff) | |
| download | coreboot-c450fbe909e7ed1bc8309ace60ad45fc65a208e1.tar.xz | |
Stoney Ridge Platforms: Make AGESA callout tables common
There was no reason to have the AGESA callout tables in each mainboard,
so move them to soc/amd/common.
Move chip specific functions into the stoneyridge directory:
- agesa_fch_initreset
- agesa_fch_initenv
- agesa_ReadSpd
Combine agesa_ReadSpd and agesa_ReadSpd_from_cbfs, and figure out which
to use.
Soldered-down memory still needs to be supported in a future commit, as
stoney supports both DDR3 & DDR4. A bug has been filed for support for
the upcoming Grunt platform.
BUG=b:67209686
TEST=Build and boot on Kahlee
Change-Id: Ife9bd90be9eb0ce0a7ce41d75cfef979b11e640b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/21849
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/mainboard/google/kahlee/bootblock')
| -rw-r--r-- | src/mainboard/google/kahlee/bootblock/BiosCallOuts.c | 24 |
1 files changed, 2 insertions, 22 deletions
diff --git a/src/mainboard/google/kahlee/bootblock/BiosCallOuts.c b/src/mainboard/google/kahlee/bootblock/BiosCallOuts.c index 42cc7585f4..73d129594d 100644 --- a/src/mainboard/google/kahlee/bootblock/BiosCallOuts.c +++ b/src/mainboard/google/kahlee/bootblock/BiosCallOuts.c @@ -21,27 +21,7 @@ extern const GPIO_CONTROL oem_kahlee_gpio[]; -static AGESA_STATUS fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr) +void platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset) { - AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; - - if (StdHeader->Func == AMD_INIT_RESET) { - FCH_RESET_DATA_BLOCK *FchParams_reset; - FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData; - printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); - FchParams_reset->FchReset.SataEnable = sb_sata_enable(); - FchParams_reset->FchReset.IdeEnable = sb_ide_enable(); - FchParams_reset->EarlyOemGpioTable = oem_kahlee_gpio; - printk(BIOS_DEBUG, "Done\n"); - } - - return AGESA_SUCCESS; + FchParams_reset->EarlyOemGpioTable = oem_kahlee_gpio; } - -const BIOS_CALLOUT_STRUCT BiosCallouts[] = { - {AGESA_DO_RESET, agesa_Reset }, - {AGESA_FCH_OEM_CALLOUT, fch_initreset }, - {AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl } -}; - -const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); |