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| author | Richard Spiegel <richard.spiegel@silverbackltd.com> | 2017-11-13 12:17:09 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-11-15 16:47:06 +0000 |
| commit | 519680948b466d786c618286ac1e8baa9cc6e22c (patch) | |
| tree | 273b85f621da9f4745dd4087e0889d54cc3c3ec4 /src/mainboard/google/kahlee/dsdt.asl | |
| parent | bffff54e09e3fb91f94bd126814aaf1c200fa96b (diff) | |
| download | coreboot-519680948b466d786c618286ac1e8baa9cc6e22c.tar.xz | |
mb/{amd/gardenia,google/kahlee}: move carrizo_fch.asl code to soc
Code within carrizo_fch should be SOC specific instead of board specific.
BUG=b:64034810
Change-Id: I5de2020411794bfcd3730789f62af9c9834a018b
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/22455
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/kahlee/dsdt.asl')
| -rw-r--r-- | src/mainboard/google/kahlee/dsdt.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/kahlee/dsdt.asl b/src/mainboard/google/kahlee/dsdt.asl index f3f8aaafd2..ed34f9daea 100644 --- a/src/mainboard/google/kahlee/dsdt.asl +++ b/src/mainboard/google/kahlee/dsdt.asl @@ -73,7 +73,7 @@ DefinitionBlock ( #include <pci_int.asl> /* Describe the devices in the Southbridge */ - #include "acpi/carrizo_fch.asl" + #include <soc_fch.asl> } /* End \_SB scope */ |