diff options
| author | Lucas Chen <lucas.chen@quanta.corp-partner.google.com> | 2018-10-18 11:49:27 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-11-13 19:04:01 +0000 |
| commit | 19651a20e2fec2620f5614c3e7a197e725d60417 (patch) | |
| tree | 86be65375550e2f102a9738dd7cf2c7c8860710b /src/mainboard/google/kahlee/variants | |
| parent | c62b477b6e24d78a7072e0f87e7062b87f9396fe (diff) | |
| download | coreboot-19651a20e2fec2620f5614c3e7a197e725d60417.tar.xz | |
google/grunt/aleena: Update H1/TP/TS i2c timings
After adjustment on aleena EVT
Audio: 390.0 KHz
H1: 390.0 KHz
TP: 399.8 KHz
TS: 399.8 kHz
BUG=b:116306959
BRANCH=master
TEST=emerge-grunt coreboot, scope measuring.
Change-Id: I6f621508ce2dbb1b9dcdf529ac35afc80d485f53
Signed-off-by: Lucas Chen <lucas.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/29548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/kahlee/variants')
| -rw-r--r-- | src/mainboard/google/kahlee/variants/aleena/devicetree.cb | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb b/src/mainboard/google/kahlee/variants/aleena/devicetree.cb index 27a8e28cd5..784ea6f414 100644 --- a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/aleena/devicetree.cb @@ -32,22 +32,22 @@ chip soc/amd/stoneyridge register "i2c[1]" = "{ .early_init = 1, .speed = I2C_SPEED_FAST, - .rise_time_ns = 84, + .rise_time_ns = 45, .fall_time_ns = 4, }" # Enable I2C2 for trackpad, pen at 400kHz register "i2c[2]" = "{ .speed = I2C_SPEED_FAST, - .rise_time_ns = 117, - .fall_time_ns = 113, + .rise_time_ns = 26, + .fall_time_ns = 11, }" # Enable I2C3 for touchscreen at 400kHz register "i2c[3]" = "{ .speed = I2C_SPEED_FAST, - .rise_time_ns = 82, - .fall_time_ns = 67, + .rise_time_ns = 20, + .fall_time_ns = 19, }" register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ |