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authorHung-Te Lin <hungte@chromium.org>2019-10-17 12:42:28 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-10-18 12:23:54 +0000
commit064d6cb8a53b022244082cb2c2ebce2f5fb02486 (patch)
treec3e59e24bb6fa0aae70ae0125a1e2688a1e2b916 /src/mainboard/google/kahlee
parenta2ea5e9f47d97237cd98bea6f29fb9dd17167721 (diff)
downloadcoreboot-064d6cb8a53b022244082cb2c2ebce2f5fb02486.tar.xz
mb/google: Shrink GBB section size
Chrome OS firmware images have moved bitmap resources from GBB into CBFS for a long time, so the GBB should only hold firmware keys and HWID, that is usually less than 10k. ARM boards usually limit GBB to 0x2f00 (see gru, cheza and kukui) but many recent x86 simply copy from old settings and may run out of space when we want to add more resources, for example EC RO software sync. Note, changing the GBB section (inside RO) implies RO update, so this change *must not* be cherry-picked back to old firmware branches if some devices were already shipped. BRANCH=none BUG=None TEST=make # board=darllion,hatch,kahlee,octopus,sarien Change-Id: I615cd7b53b556019f2d54d0df7ac2723d36ee6cf Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36088 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Mathew King <mathewk@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/google/kahlee')
-rw-r--r--src/mainboard/google/kahlee/variants/baseboard/chromeos.fmd4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/kahlee/variants/baseboard/chromeos.fmd b/src/mainboard/google/kahlee/variants/baseboard/chromeos.fmd
index b746545488..d7d0a886d3 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/chromeos.fmd
+++ b/src/mainboard/google/kahlee/variants/baseboard/chromeos.fmd
@@ -33,8 +33,8 @@ FLASH@0xFF000000 0x1000000 {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0
- GBB@0x1000 0x70000
- COREBOOT(CBFS)@0x71000 0x210000
+ GBB@0x1000 0x3000
+ COREBOOT(CBFS)@0x4000 0x27d000
}
}
}