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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-03-27 10:39:55 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-10 15:13:07 +0000 |
| commit | 1119428693e9a8b071115187e601f94d1d706c23 (patch) | |
| tree | 0340ea7848ef73188ca92372ae56d38c1bdcb9c7 /src/mainboard/google/kahlee | |
| parent | 4feaf6b7b8745ba5a98b9b9372bb0a53b36b38e8 (diff) | |
| download | coreboot-1119428693e9a8b071115187e601f94d1d706c23.tar.xz | |
soc/intel/braswell/smbus: Enable early SMBus in romstage
Enable early SMBus support compatible with SPD library using Intel SB
common SMBus API.
TEST=boot Protectli FW2B with new FSP, MemoryInit should pass without
errors
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I92a2c5a6d0b38e5658cfdc017041f12717dabdd5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/google/kahlee')
0 files changed, 0 insertions, 0 deletions