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| author | Tristan Shieh <tristan.shieh@mediatek.com> | 2019-01-28 13:28:14 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-29 12:30:47 +0000 |
| commit | 1e504f7811273b5a6a94bb82b94031112069dd56 (patch) | |
| tree | 1f4c11d7d8a8f869aa0cefef6811d72956a19e9b /src/mainboard/google/kukui/Makefile.inc | |
| parent | e6a03e0b1b75b8470c992346376e098187b14f12 (diff) | |
| download | coreboot-1e504f7811273b5a6a94bb82b94031112069dd56.tar.xz | |
google/kukui: Implement HW reset function
Asserting GPIO PERIPHERAL_EN8 will send a signal to EC to trigger a HW
reset for SoC and H1.
BUG=b:80501386
BRANCH=none
TEST=emerge-kukui coreboot; manually verified the do_board_reset() on
Kukui P1
Change-Id: I9afad84af2031a766bc08fc76c8b5f55588c453a
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/31118
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/kukui/Makefile.inc')
| -rw-r--r-- | src/mainboard/google/kukui/Makefile.inc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc index acd2c45417..9f8c313e74 100644 --- a/src/mainboard/google/kukui/Makefile.inc +++ b/src/mainboard/google/kukui/Makefile.inc @@ -4,15 +4,18 @@ bootblock-y += boardid.c bootblock-y += bootblock.c bootblock-y += chromeos.c bootblock-y += memlayout.ld +bootblock-y += reset.c decompressor-y += memlayout.ld verstage-y += chromeos.c +verstage-y += reset.c verstage-y += verstage.c verstage-y += memlayout.ld romstage-y += boardid.c romstage-y += chromeos.c romstage-y += memlayout.ld +romstage-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c @@ -20,3 +23,4 @@ ramstage-y += boardid.c ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += memlayout.ld +ramstage-y += reset.c |