diff options
| author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-07-06 15:37:05 +0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2018-07-27 05:35:43 +0000 |
| commit | 131ff8ccec9677144cbed19dba3f4ef1851cce8f (patch) | |
| tree | f0ffbe9d3247b0d5d7e943f309a63cc5ed1265d4 /src/mainboard/google/kukui/chromeos.fmd | |
| parent | 9faa584cc94e4254d8cba7672671e11f9dc0c893 (diff) | |
| download | coreboot-131ff8ccec9677144cbed19dba3f4ef1851cce8f.tar.xz | |
google/kukui: Add SPI NOR support
This patch sets SPI flash related configs and inits SPI bus 1 to
support SPI NOR flash.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui
Change-Id: I1a18a456f41a7c7daec954e961c9fbee3650493d
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/27499
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/kukui/chromeos.fmd')
| -rw-r--r-- | src/mainboard/google/kukui/chromeos.fmd | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/kukui/chromeos.fmd b/src/mainboard/google/kukui/chromeos.fmd index 9c618e3cdf..a521b0c1a3 100644 --- a/src/mainboard/google/kukui/chromeos.fmd +++ b/src/mainboard/google/kukui/chromeos.fmd @@ -1,4 +1,4 @@ -FLASH@0x0 0x400000 { +FLASH@0x0 0x800000 { WP_RO@0x0 0x200000 { RO_SECTION@0x0 0x1f0000 { BOOTBLOCK@0 128K |