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author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-06-19 16:07:54 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-11 10:46:25 +0000 |
commit | bb684e0c8d636b0f9753ddf6237880543a365f48 (patch) | |
tree | 24ab6309637b50861a2e83837cc502e596853ada /src/mainboard/google/kukui/romstage.c | |
parent | 0eb92dfbc7ceeec6af0e5f0e2ace6c389541838f (diff) | |
download | coreboot-bb684e0c8d636b0f9753ddf6237880543a365f48.tar.xz |
google/kukui: Update MMU table in romstage and ramstage
In order to get better performance, map dram as cached after dram ready
in romstage.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui. Need a futher check after dram
calibration code ready.
Change-Id: Ie541fe08ee1d5b260abbabc0a5c18fb04e602b9c
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/27304
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/kukui/romstage.c')
-rw-r--r-- | src/mainboard/google/kukui/romstage.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/romstage.c b/src/mainboard/google/kukui/romstage.c index d63b7c888d..342a0ba3d2 100644 --- a/src/mainboard/google/kukui/romstage.c +++ b/src/mainboard/google/kukui/romstage.c @@ -16,6 +16,7 @@ #include <arch/exception.h> #include <console/console.h> #include <program_loading.h> +#include <soc/mmu_operations.h> #include <timestamp.h> void main(void) @@ -26,5 +27,7 @@ void main(void) console_init(); exception_init(); + mtk_mmu_after_dram(); + run_ramstage(); } |