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authorTristan Shieh <tristan.shieh@mediatek.com>2018-08-21 10:33:10 +0800
committerMartin Roth <martinroth@google.com>2018-08-28 15:12:05 +0000
commitfdcc0b39156f915cdc8ee7221fca6d8640545f25 (patch)
tree518d8140b77a7a6d76be4a5beddc70524d2b6694 /src/mainboard/google/kukui
parent3762e99893a7a0978fec72dc955cf2976d3dc5a5 (diff)
downloadcoreboot-fdcc0b39156f915cdc8ee7221fca6d8640545f25.tar.xz
google/kukui: Set up GPIOs for ChromeOS
Set up EC interrupt GPIO to boot depthcharge. Without this patch, depthcharge will fail to detect EC interrupt GPIO. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui and see in logs, that depthcharge detects EC interrupt GPIO. Change-Id: I0ec2c70c189a059219954e0384aaf98995285728 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/28250 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/kukui')
-rw-r--r--src/mainboard/google/kukui/Makefile.inc1
-rw-r--r--src/mainboard/google/kukui/bootblock.c4
-rw-r--r--src/mainboard/google/kukui/chromeos.c12
-rw-r--r--src/mainboard/google/kukui/gpio.h25
4 files changed, 42 insertions, 0 deletions
diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc
index 290be4cf0e..aa6bf11812 100644
--- a/src/mainboard/google/kukui/Makefile.inc
+++ b/src/mainboard/google/kukui/Makefile.inc
@@ -1,4 +1,5 @@
bootblock-y += bootblock.c
+bootblock-y += chromeos.c
bootblock-y += memlayout.ld
decompressor-y += memlayout.ld
diff --git a/src/mainboard/google/kukui/bootblock.c b/src/mainboard/google/kukui/bootblock.c
index d8b5c5a59d..fa51488501 100644
--- a/src/mainboard/google/kukui/bootblock.c
+++ b/src/mainboard/google/kukui/bootblock.c
@@ -18,10 +18,14 @@
#include <soc/gpio.h>
#include <soc/spi.h>
+#include "gpio.h"
+
#define BOOTBLOCK_EN_L (GPIO(KPROW0))
void bootblock_mainboard_init(void)
{
+ setup_chromeos_gpios();
+
/* Turn on real eMMC. */
gpio_output(BOOTBLOCK_EN_L, 1);
diff --git a/src/mainboard/google/kukui/chromeos.c b/src/mainboard/google/kukui/chromeos.c
index 7f9946ae40..9184d8835d 100644
--- a/src/mainboard/google/kukui/chromeos.c
+++ b/src/mainboard/google/kukui/chromeos.c
@@ -15,9 +15,21 @@
#include <bootmode.h>
#include <boot/coreboot_tables.h>
+#include <gpio.h>
+
+#include "gpio.h"
+
+void setup_chromeos_gpios(void)
+{
+ gpio_input_pullup(EC_IRQ);
+}
void fill_lb_gpios(struct lb_gpios *gpios)
{
+ struct lb_gpio chromeos_gpios[] = {
+ {EC_IRQ.id, ACTIVE_LOW, -1, "EC interrupt"},
+ };
+ lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
}
int get_recovery_mode_switch(void)
diff --git a/src/mainboard/google/kukui/gpio.h b/src/mainboard/google/kukui/gpio.h
new file mode 100644
index 0000000000..cb9ad24906
--- /dev/null
+++ b/src/mainboard/google/kukui/gpio.h
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MAINBOARD_GOOGLE_KUKUI_GPIO_H__
+#define __MAINBOARD_GOOGLE_KUKUI_GPIO_H__
+
+#include <soc/gpio.h>
+
+#define EC_IRQ GPIO(PERIPHERAL_EN1)
+
+void setup_chromeos_gpios(void);
+
+#endif