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author | Subrata Banik <subrata.banik@intel.com> | 2018-05-17 13:53:29 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2018-06-06 06:16:49 +0000 |
commit | 19cd07f2a015b419e55ee998ea67fd2e1ff7b2ff (patch) | |
tree | a5652a89b4983ca996527a990806c93f816ecde1 /src/mainboard/google/lars/devicetree.cb | |
parent | b41ae259d9c1199ae6dc38e37ed21456083750ab (diff) | |
download | coreboot-19cd07f2a015b419e55ee998ea67fd2e1ff7b2ff.tar.xz |
soc/intel/common/pch: Make infrastructure ready for pch common code
This patch is intended to make Intel common PCH code based on
Gen-6 Sunrisepoint PCH (SPT).
All common PCH code blocks between Gen-6 till latest-PCH should be
part of soc/intel/common/pch/ directory.
A SoC Kconfig might select this option to include base PCH package
while building new SOC block. Currently majority of
common IP code blocks are part of soc/intel/common/block/ and
SoC Kconfig just select those Kconfig option. Now addition to that
SoC might only selects required base PCH block to include those
common IP block selections.
BUG=none
BRANCH=b:78109109
TEST=soc code can select PCH config option
Change-Id: I2934e3b1aed9d692eb00df18ce69a7fcd3096f6b
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/26348
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/lars/devicetree.cb')
0 files changed, 0 insertions, 0 deletions