diff options
| author | Stefan Reinauer <reinauer@chromium.org> | 2013-02-21 15:48:37 -0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-02-23 04:27:08 +0100 |
| commit | 49428d840323210433c96740545246296d65b3f2 (patch) | |
| tree | 8df16295185d676adb3baae767f230f58cfceb0c /src/mainboard/google/link/Kconfig | |
| parent | 940095fe5e4181f1708ff2298f17f7056b8e18ff (diff) | |
| download | coreboot-49428d840323210433c96740545246296d65b3f2.tar.xz | |
Add support for Google's Chromebook Pixel
Ladies and gentlemen, I'm very happy to announce coreboot support for
the latest and greatest Google Chromebook: The Chromebook Pixel.
See the link below for more information on the Chromebook Pixel, and
its exciting specs:
http://www.google.com/intl/en/chrome/devices/chromebooks.html#pixel
The device is running coreboot and open source firmware on the EC
(see ChromeEC commit for more information on that exciting topic)
Change-Id: I03d00cf391bbb1a32f330793fe9058493e088571
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2482
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google/link/Kconfig')
| -rw-r--r-- | src/mainboard/google/link/Kconfig | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/mainboard/google/link/Kconfig b/src/mainboard/google/link/Kconfig new file mode 100644 index 0000000000..57e77289a4 --- /dev/null +++ b/src/mainboard/google/link/Kconfig @@ -0,0 +1,48 @@ +if BOARD_GOOGLE_LINK + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_X86 + select CPU_INTEL_SOCKET_RPGA989 + select NORTHBRIDGE_INTEL_IVYBRIDGE + select SOUTHBRIDGE_INTEL_C216 + select BOARD_ROMSIZE_KB_8192 + select EC_GOOGLE_CHROMEEC + select BOARD_HAS_FADT + select HAVE_ACPI_TABLES + select HAVE_OPTION_TABLE + select HAVE_ACPI_RESUME + select HAVE_MAINBOARD_RESOURCES + select MMCONF_SUPPORT + select HAVE_SMI_HANDLER + select GFXUMA + select CHROMEOS + select EXTERNAL_MRC_BLOB + select SERIRQ_CONTINUOUS_MODE + select MAINBOARD_HAS_NATIVE_VGA_INIT + +config MAINBOARD_DIR + string + default google/link + +config MAINBOARD_PART_NUMBER + string + default "Link" + +config MMCONF_BASE_ADDRESS + hex + default 0xf0000000 + +config IRQ_SLOT_COUNT + int + default 18 + +config MAX_CPUS + int + default 8 + +config VGA_BIOS_FILE + string + default "pci8086,0166.rom" + +endif # BOARD_GOOGLE_LINK |