summaryrefslogtreecommitdiff
path: root/src/mainboard/google/link/chromeos.c
diff options
context:
space:
mode:
authorJoel Kitching <kitching@google.com>2019-03-23 12:41:04 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-27 08:21:01 +0000
commit2e1f65545f7ee826322aef6a586a2580a23db775 (patch)
tree9bb929c38b2b738a5fa4f517f185f7be9ff08304 /src/mainboard/google/link/chromeos.c
parentf7f41a663f11f57a463177d4f7c9df165830c821 (diff)
downloadcoreboot-2e1f65545f7ee826322aef6a586a2580a23db775.tar.xz
chromeos: update old boards to use lb_add_gpios notation
Instead of manually filling out the lb_gpios struct, use the newer lb_add_gpios notation, which is more compact and less error-prone. BUG=b:124141368 TEST=util/lint/checkpatch.pl -g origin/master..HEAD TEST=util/abuild/abuild -B -e -y -c 50 -p none -x BRANCH=none Change-Id: I90795f32be5de881c94519933f36127098c184df Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32031 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/link/chromeos.c')
-rw-r--r--src/mainboard/google/link/chromeos.c55
1 files changed, 20 insertions, 35 deletions
diff --git a/src/mainboard/google/link/chromeos.c b/src/mainboard/google/link/chromeos.c
index 335f1f7f79..5156404ab7 100644
--- a/src/mainboard/google/link/chromeos.c
+++ b/src/mainboard/google/link/chromeos.c
@@ -22,43 +22,28 @@
#ifndef __PRE_RAM__
#include <boot/coreboot_tables.h>
-#define GPIO_COUNT 6
-
void fill_lb_gpios(struct lb_gpios *gpios)
{
- gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
- gpios->count = GPIO_COUNT;
-
- /* Write Protect: GPIO57 = PCH_SPI_WP_D */
- gpios->gpios[0].port = 57;
- gpios->gpios[0].polarity = ACTIVE_HIGH;
- gpios->gpios[0].value = get_write_protect_state();
- strncpy((char *)gpios->gpios[0].name,"write protect",
- GPIO_MAX_NAME_LENGTH);
- /* Recovery: the "switch" comes from the EC */
- gpios->gpios[1].port = -1; /* Indicate that this is a pseudo GPIO */
- gpios->gpios[1].polarity = ACTIVE_HIGH;
- gpios->gpios[1].value = get_recovery_mode_switch();
- strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH);
-
- /* Lid: the "switch" comes from the EC */
- gpios->gpios[2].port = -1;
- gpios->gpios[2].polarity = ACTIVE_HIGH;
- gpios->gpios[2].value = get_lid_switch();
- strncpy((char *)gpios->gpios[2].name,"lid", GPIO_MAX_NAME_LENGTH);
-
- /* Power Button: hard-coded as not pressed; we'll detect later presses
- * via SMI. */
- gpios->gpios[3].port = -1;
- gpios->gpios[3].polarity = ACTIVE_HIGH;
- gpios->gpios[3].value = 0;
- strncpy((char *)gpios->gpios[3].name,"power", GPIO_MAX_NAME_LENGTH);
-
- /* Did we load the VGA Option ROM? */
- gpios->gpios[5].port = -1; /* Indicate that this is a pseudo GPIO */
- gpios->gpios[5].polarity = ACTIVE_HIGH;
- gpios->gpios[5].value = gfx_get_init_done();
- strncpy((char *)gpios->gpios[5].name,"oprom", GPIO_MAX_NAME_LENGTH);
+ struct lb_gpio chromeos_gpios[] = {
+ /* Write Protect: GPIO57 = PCH_SPI_WP_D */
+ {57, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
+
+ /* Recovery: the "switch" comes from the EC */
+ /* -1 indicates that this is a pseudo GPIO */
+ {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
+
+ /* Lid: the "switch" comes from the EC */
+ {-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
+
+ /* Power Button: hard-coded as not pressed; we'll detect later
+ * presses via SMI. */
+ {-1, ACTIVE_HIGH, 0, "power"},
+
+ /* Did we load the VGA Option ROM? */
+ /* -1 indicates that this is a pseudo GPIO */
+ {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
+ };
+ lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
}
#endif