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author | Vladimir Serbinenko <phcoder@gmail.com> | 2016-02-10 03:07:42 +0100 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2016-02-12 19:10:04 +0100 |
commit | b2ad8108abe1e91603938610e2fd7b333b944c8a (patch) | |
tree | 24dcaa87bd6886a33c24e02cc2a4ad1f83c49196 /src/mainboard/google/link/devicetree.cb | |
parent | cf0e9021daad9705b7b5733ecfcf141c8a2b5f5f (diff) | |
download | coreboot-b2ad8108abe1e91603938610e2fd7b333b944c8a.tar.xz |
link: Support native raminit
Change-Id: I95173c06d334a340fa2157511a1d69f38877b264
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13665
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/google/link/devicetree.cb')
-rw-r--r-- | src/mainboard/google/link/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/link/devicetree.cb b/src/mainboard/google/link/devicetree.cb index 5ac8d6b4b1..437b3cbfc8 100644 --- a/src/mainboard/google/link/devicetree.cb +++ b/src/mainboard/google/link/devicetree.cb @@ -18,6 +18,8 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x00000200" register "gpu_pch_backlight" = "0x04000000" + register "max_mem_clock_mhz" = "666" + device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end |