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authorAaron Durbin <adurbin@chromium.org>2016-07-25 21:31:41 -0500
committerDuncan Laurie <dlaurie@chromium.org>2016-07-30 01:36:32 +0200
commitb0f81518b5c17466bc95ebdef292e82c4b76bc88 (patch)
tree7174d0006c9a8450ada5aeb7c6fe6377407e96a6 /src/mainboard/google/link
parent212820c8d728c59fa3228ce92bc1d549b232e35a (diff)
downloadcoreboot-b0f81518b5c17466bc95ebdef292e82c4b76bc88.tar.xz
chromeos mainboards: remove chromeos.asl
Use the ACPI generator for creating the Chrome OS gpio package. Each mainboard has its own list of Chrome OS gpios that are fed into a helper to generate the ACPI external OIPG package. Additionally, the common chromeos.asl is now conditionally included based on CONFIG_CHROMEOS. Change-Id: I1d3d951964374a9d43521879d4c265fa513920d2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15909 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/google/link')
-rw-r--r--src/mainboard/google/link/acpi/chromeos.asl19
-rw-r--r--src/mainboard/google/link/chromeos.c11
-rw-r--r--src/mainboard/google/link/dsdt.asl1
-rw-r--r--src/mainboard/google/link/mainboard.c2
4 files changed, 13 insertions, 20 deletions
diff --git a/src/mainboard/google/link/acpi/chromeos.asl b/src/mainboard/google/link/acpi/chromeos.asl
deleted file mode 100644
index eec650acb2..0000000000
--- a/src/mainboard/google/link/acpi/chromeos.asl
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-Name(OIPG, Package() {
- Package() { 0x001, 0, 9, "PantherPoint" }, // recovery button
- Package() { 0x003, 1, 57, "PantherPoint" }, // firmware write protect
-})
diff --git a/src/mainboard/google/link/chromeos.c b/src/mainboard/google/link/chromeos.c
index d07e8514e3..4be31d9fa4 100644
--- a/src/mainboard/google/link/chromeos.c
+++ b/src/mainboard/google/link/chromeos.c
@@ -22,6 +22,7 @@
#include <southbridge/intel/common/gpio.h>
#include "ec.h"
#include <ec/google/chromeec/ec.h>
+#include <vendorcode/google/chromeos/chromeos.h>
#ifndef __PRE_RAM__
#include <boot/coreboot_tables.h>
@@ -107,3 +108,13 @@ int get_recovery_mode_switch(void)
return !!(ec_events &
EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY));
}
+
+static const struct cros_gpio cros_gpios[] = {
+ CROS_GPIO_REC_AL(9, CROS_GPIO_DEVICE_NAME),
+ CROS_GPIO_WP_AH(57, CROS_GPIO_DEVICE_NAME),
+};
+
+void mainboard_chromeos_acpi_generate(void)
+{
+ chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios));
+}
diff --git a/src/mainboard/google/link/dsdt.asl b/src/mainboard/google/link/dsdt.asl
index be6a412486..da4587d2f3 100644
--- a/src/mainboard/google/link/dsdt.asl
+++ b/src/mainboard/google/link/dsdt.asl
@@ -50,7 +50,6 @@ DefinitionBlock(
}
}
- #include "acpi/chromeos.asl"
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */
diff --git a/src/mainboard/google/link/mainboard.c b/src/mainboard/google/link/mainboard.c
index 922061f6da..53915d2083 100644
--- a/src/mainboard/google/link/mainboard.c
+++ b/src/mainboard/google/link/mainboard.c
@@ -36,6 +36,7 @@
#include <smbios.h>
#include <device/pci.h>
#include <ec/google/chromeec/ec.h>
+#include <vendorcode/google/chromeos/chromeos.h>
/* placeholder for evenual link post. Not sure what we'll
* do but it will look nice
@@ -199,6 +200,7 @@ static void mainboard_enable(device_t dev)
{
dev->ops->init = mainboard_init;
dev->ops->get_smbios_data = link_onboard_smbios_data;
+ dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
#if CONFIG_VGA_ROM_RUN
/* Install custom int15 handler for VGA OPROM */
mainboard_interrupt_handlers(0x15, &int15_handler);