summaryrefslogtreecommitdiff
path: root/src/mainboard/google/link
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2018-08-11 13:19:23 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-08-13 15:36:43 +0000
commit2527648d8c258581bc1c32576d248f15a13b48dd (patch)
treef43200fb01a6d07ed6d96d24aca290f9c048d1ae /src/mainboard/google/link
parente308cc6186e9768252d1e475624edd2426d7aac0 (diff)
downloadcoreboot-2527648d8c258581bc1c32576d248f15a13b48dd.tar.xz
src/mb: Remove some unneeded includes
Change-Id: I3108193c0e0b644cecb74ae0c7a7b54e24a75b58 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28049 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/google/link')
-rw-r--r--src/mainboard/google/link/i915.c1
-rw-r--r--src/mainboard/google/link/mainboard.c1
-rw-r--r--src/mainboard/google/link/romstage.c2
3 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/link/i915.c b/src/mainboard/google/link/i915.c
index 755fecb313..da6d69891a 100644
--- a/src/mainboard/google/link/i915.c
+++ b/src/mainboard/google/link/i915.c
@@ -22,7 +22,6 @@
#include <device/pci_ops.h>
#include <console/console.h>
#include <delay.h>
-#include <pc80/mc146818rtc.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <arch/interrupt.h>
diff --git a/src/mainboard/google/link/mainboard.c b/src/mainboard/google/link/mainboard.c
index ce61912ae7..6f529da521 100644
--- a/src/mainboard/google/link/mainboard.c
+++ b/src/mainboard/google/link/mainboard.c
@@ -24,7 +24,6 @@
#if IS_ENABLED(CONFIG_VGA_ROM_RUN)
#include <x86emu/x86emu.h>
#endif
-#include <pc80/mc146818rtc.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <arch/interrupt.h>
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index e09525407e..495c80ee6d 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -23,7 +23,6 @@
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
#include <arch/acpi.h>
#include <console/console.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
@@ -32,7 +31,6 @@
#include <southbridge/intel/common/gpio.h>
#include "ec/google/chromeec/ec.h"
#include <arch/cpu.h>
-#include <cpu/x86/msr.h>
#include <halt.h>
#include <cbfs.h>