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| author | Stefan Reinauer <reinauer@chromium.org> | 2013-03-21 11:51:41 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-22 00:00:09 +0100 |
| commit | 24d1d4b47274eb82893e6726472a991a36fce0aa (patch) | |
| tree | 57126316330f6f9d407f605fa831ce530650f069 /src/mainboard/google/link | |
| parent | 55ed3106556a9bcbe36d3389dc5230d4a4ee2a40 (diff) | |
| download | coreboot-24d1d4b47274eb82893e6726472a991a36fce0aa.tar.xz | |
x86: Unify arch/io.h and arch/romcc_io.h
Here's the great news: From now on you don't have to worry about
hitting the right io.h include anymore. Just forget about romcc_io.h
and use io.h instead. This cleanup has a number of advantages, like
you don't have to guard device/ includes for SMM and pre RAM
anymore. This allows to get rid of a number of ifdefs and will
generally make the code more readable and understandable.
Potentially in the future some of the code in the io.h __PRE_RAM__
path should move to device.h or other device/ includes instead,
but that's another incremental change.
Change-Id: I356f06110e2e355e9a5b4b08c132591f36fec7d9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2872
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google/link')
| -rw-r--r-- | src/mainboard/google/link/chromeos.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/link/mainboard_smi.c | 1 | ||||
| -rw-r--r-- | src/mainboard/google/link/romstage.c | 1 |
3 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/google/link/chromeos.c b/src/mainboard/google/link/chromeos.c index 04f68a9b1a..4ab5017f52 100644 --- a/src/mainboard/google/link/chromeos.c +++ b/src/mainboard/google/link/chromeos.c @@ -20,12 +20,8 @@ #include <string.h> #include <vendorcode/google/chromeos/chromeos.h> #include <arch/io.h> -#ifdef __PRE_RAM__ -#include <arch/romcc_io.h> -#else #include <device/device.h> #include <device/pci.h> -#endif #include <southbridge/intel/bd82x6x/pch.h> #include "ec.h" #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/link/mainboard_smi.c b/src/mainboard/google/link/mainboard_smi.c index 54cfb01f87..a4c4a50351 100644 --- a/src/mainboard/google/link/mainboard_smi.c +++ b/src/mainboard/google/link/mainboard_smi.c @@ -18,7 +18,6 @@ */ #include <arch/io.h> -#include <arch/romcc_io.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <southbridge/intel/bd82x6x/nvs.h> diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index 689d2b52fa..f20a7226ab 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -24,7 +24,6 @@ #include <timestamp.h> #include <arch/byteorder.h> #include <arch/io.h> -#include <arch/romcc_io.h> #include <device/pci.h> #include <device/pci_def.h> #include <device/pnp_def.h> |