mainboard/google/mistral: Add support for Mistral

Adding a new board variant 'Mistral' based on qcs405 soc.

TEST=build

Change-Id: I7ecfad68bb50f42acf36f51bc3433add56597c3d
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29949
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

1 files changed, 51 insertions, 0 deletions

diff --git a/src/mainboard/google/mistral/chromeos.fmd b/src/mainboard/google/mistral/chromeos.fmd
new file mode 100644
index 0000000000..633df2ee42
--- /dev/null
+++ b/src/mainboard/google/mistral/chromeos.fmd
@@ -0,0 +1,51 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2018, The Linux Foundation.  All rights reserved.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License version 2 and
+## only version 2 as published by the Free Software Foundation.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+
+FLASH@0x0 8M {
+	WP_RO 4M {
+		RO_SECTION 0x204000 {
+			BOOTBLOCK 96K
+			COREBOOT(CBFS)
+			FMAP@0x200000 0x1000
+			GBB 0x2f00
+			RO_FRID 0x100
+		}
+		RO_VPD 128K
+		RO_DDR_TRAINING(PRESERVE) 8K
+	}
+
+	RW_VPD(PRESERVE) 32K
+	RW_NVRAM(PRESERVE) 16K
+	RW_DDR_TRAINING(PRESERVE) 8K
+	RW_ELOG(PRESERVE) 4K
+	RW_SHARED 4K {
+		SHARED_DATA
+	}
+
+	RW_SECTION_A 1280K {
+		VBLOCK_A 8K
+		FW_MAIN_A(CBFS)
+		RW_FWID_A 256
+	}
+
+
+	RW_SECTION_B 1280K {
+		VBLOCK_B 8K
+		FW_MAIN_B(CBFS)
+		RW_FWID_B 256
+	}
+
+	RW_LEGACY(CBFS)
+}