summaryrefslogtreecommitdiff
path: root/src/mainboard/google/mistral
diff options
context:
space:
mode:
authorPatrick Georgi <pgeorgi@google.com>2019-03-22 15:19:05 +0530
committerStefan Reinauer <stefan.reinauer@coreboot.org>2019-06-02 19:51:50 +0000
commitc82acf59311abbb7e27add8d452282d57ed988aa (patch)
tree748dd7da689e7c2d21daa4cbe90dd0b6400bc02d /src/mainboard/google/mistral
parent2761847f904ce695fc8e47929f65bf6da64bcb6d (diff)
downloadcoreboot-c82acf59311abbb7e27add8d452282d57ed988aa.tar.xz
qualcomm/qcs405: enable SPI bus 4 for TPM
Change-Id: Ic282daf10dad42bc4513cc55f15ce80a4bd316a5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Signed-off-by: Prudhvi Yarlagadda <pyarlaga@codeaurora.org> Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30934 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/mistral')
-rw-r--r--src/mainboard/google/mistral/Makefile.inc1
-rw-r--r--src/mainboard/google/mistral/verstage.c31
2 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/google/mistral/Makefile.inc b/src/mainboard/google/mistral/Makefile.inc
index 2cb963123b..ca191d147e 100644
--- a/src/mainboard/google/mistral/Makefile.inc
+++ b/src/mainboard/google/mistral/Makefile.inc
@@ -7,6 +7,7 @@ bootblock-y += bootblock.c
verstage-y += memlayout.ld
verstage-y += chromeos.c
verstage-y += reset.c
+verstage-y += verstage.c
romstage-y += memlayout.ld
romstage-y += chromeos.c
diff --git a/src/mainboard/google/mistral/verstage.c b/src/mainboard/google/mistral/verstage.c
new file mode 100644
index 0000000000..a34e4fa361
--- /dev/null
+++ b/src/mainboard/google/mistral/verstage.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <console/console.h>
+#include <security/vboot/vboot_common.h>
+#include <soc/clock.h>
+#include <spi-generic.h>
+
+void verstage_mainboard_init(void)
+{
+ struct spi_slave spi;
+
+ printk(BIOS_ERR, "Trying to initialize TPM SPI bus\n");
+ if (spi_setup_slave(CONFIG_DRIVER_TPM_SPI_BUS,
+ CONFIG_DRIVER_TPM_SPI_CHIP, &spi)) {
+ printk(BIOS_ERR, "Failed to setup TPM SPI slave\n");
+ }
+}