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authorFurquan Shaikh <furquan@google.com>2020-06-11 11:59:07 -0700
committerFurquan Shaikh <furquan@google.com>2020-06-13 06:49:23 +0000
commit46514c2b877c29c2d7c2061a9785736e270c0c62 (patch)
tree2f78550192bce548139ef49fdac6623dad578703 /src/mainboard/google/nyan
parent00148bba7146318e2e815d8c13e33278f63814c9 (diff)
downloadcoreboot-46514c2b877c29c2d7c2061a9785736e270c0c62.tar.xz
treewide: Add Kconfig variable MEMLAYOUT_LD_FILE
This change defines a Kconfig variable MEMLAYOUT_LD_FILE which allows SoC/mainboard to provide a linker file for the platform. x86 already provides a default memlayout.ld under src/arch/x86. With this new Kconfig variable, it is possible for the SoC/mainboard code for x86 to provide a custom linker file as well. Makefile.inc is updated for all architectures to use this new Kconfig variable instead of assuming memlayout.ld files under a certain path. All non-x86 boards used memlayout.ld under mainboard directory. However, a lot of these boards were simply including the memlayout from SoC. So, this change also updates these mainboards and SoCs to define the Kconfig as required. BUG=b:155322763 TEST=Verified that abuild with --timeless option results in the same coreboot.rom image for all boards. Change-Id: I6a7f96643ed0519c93967ea2c3bcd881a5d6a4d6 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42292 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/nyan')
-rw-r--r--src/mainboard/google/nyan/Makefile.inc5
-rw-r--r--src/mainboard/google/nyan/memlayout.ld3
2 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/google/nyan/Makefile.inc b/src/mainboard/google/nyan/Makefile.inc
index 124d4121d7..190cfc5127 100644
--- a/src/mainboard/google/nyan/Makefile.inc
+++ b/src/mainboard/google/nyan/Makefile.inc
@@ -29,8 +29,3 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c
verstage-y += reset.c
verstage-$(CONFIG_CHROMEOS) += chromeos.c
verstage-y += early_configs.c
-
-bootblock-y += memlayout.ld
-verstage-y += memlayout.ld
-romstage-y += memlayout.ld
-ramstage-y += memlayout.ld
diff --git a/src/mainboard/google/nyan/memlayout.ld b/src/mainboard/google/nyan/memlayout.ld
deleted file mode 100644
index 0f1fcec9a0..0000000000
--- a/src/mainboard/google/nyan/memlayout.ld
+++ /dev/null
@@ -1,3 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <soc/memlayout.ld>