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author | Gabe Black <gabeblack@google.com> | 2014-04-07 01:05:44 -0700 |
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committer | Marc Jones <marc.jones@se-eng.com> | 2014-12-15 19:58:20 +0100 |
commit | 9d32739baaf86e845436aec6c43580c5626d3499 (patch) | |
tree | 3bc8055a56cf8d9f791f570dac7ee6c544946b05 /src/mainboard/google/nyan_big | |
parent | f296c9452269ca22143004aa74f70e66288d4ddd (diff) | |
download | coreboot-9d32739baaf86e845436aec6c43580c5626d3499.tar.xz |
tegra124: More improvements to the clock initialization macros.
Consolidate the register setting clrsetbits_le32 call to simplify the macros.
Add a check for bits of the divisor being dropped. The clock source registers
will throw away bits that aren't supported, so we can check for divisor
overflow by checking for dropped bits.
BUG=None
TEST=Purposefully tried to set a clock to a rate which overflows its divisor.
Verified that the check triggered. Booted on nyan. Verified the TPM i2c bus
frequency was still correct.
BRANCH=None
Original-Change-Id: I3b1b6ba57f6b7729f303d15a16b685a48751d41f
Original-Signed-off-by: Gabe Black <gabeblack@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/193348
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 9cd79dd974d8a3c31398f8fbd62750b194867891)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Id4d8ecfeff52737cdd68999028b37cbdedb0d116
Reviewed-on: http://review.coreboot.org/7738
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/nyan_big')
0 files changed, 0 insertions, 0 deletions