diff options
author | Julius Werner <jwerner@chromium.org> | 2019-12-02 22:03:27 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-04 14:11:17 +0000 |
commit | 55009af42c39f413c49503670ce9bc2858974962 (patch) | |
tree | 099e9728bfe8066999de4d7a30021eb10bd71d12 /src/mainboard/google/nyan_blaze/mainboard.c | |
parent | 1c371572188a90ea16275460dd4ab6bf9966350b (diff) | |
download | coreboot-55009af42c39f413c49503670ce9bc2858974962.tar.xz |
Change all clrsetbits_leXX() to clrsetbitsXX()
This patch changes all existing instances of clrsetbits_leXX() to the
new endian-independent clrsetbitsXX(), after double-checking that
they're all in SoC-specific code operating on CPU registers and not
actually trying to make an endian conversion.
This patch was created by running
sed -i -e 's/\([cs][le][rt]bits\)_le\([136][624]\)/\1\2/g'
across the codebase and cleaning up formatting a bit.
Change-Id: I7fc3e736e5fe927da8960fdcd2aae607b62b5ff4
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/mainboard/google/nyan_blaze/mainboard.c')
-rw-r--r-- | src/mainboard/google/nyan_blaze/mainboard.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/nyan_blaze/mainboard.c b/src/mainboard/google/nyan_blaze/mainboard.c index 7f8abab119..d57ac8bdd8 100644 --- a/src/mainboard/google/nyan_blaze/mainboard.c +++ b/src/mainboard/google/nyan_blaze/mainboard.c @@ -61,9 +61,9 @@ static void set_clock_sources(void) clock_configure_irregular_source(host1x, PLLP, 408000, 4); /* Use PLLD_OUT0 as clock source for disp1 */ - clrsetbits_le32(&clk_rst->clk_src_disp1, - CLK_SOURCE_MASK | CLK_DIVISOR_MASK, - 2 /*PLLD_OUT0 */ << CLK_SOURCE_SHIFT); + clrsetbits32(&clk_rst->clk_src_disp1, + CLK_SOURCE_MASK | CLK_DIVISOR_MASK, + 2 /*PLLD_OUT0 */ << CLK_SOURCE_SHIFT); } |