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authorYH Huang <yh.huang@mediatek.com>2015-07-31 17:11:07 +0800
committerPatrick Georgi <pgeorgi@google.com>2016-01-22 19:37:54 +0100
commit1fcee36ad7a52d81d8a47d639e81de836d951535 (patch)
tree5c87ba6f2ae4a831952568d5c1354c855858e77a /src/mainboard/google/oak/mainboard.c
parent9733ba5bd0ca97efb08141f623f198b9c87e6d0f (diff)
downloadcoreboot-1fcee36ad7a52d81d8a47d639e81de836d951535.tar.xz
google/oak: Configure backlight control pins
Since backlight is controlled in depthcharge, we only configure control pins as output pin and set them power-off in the coreboot stage. BRANCH=none BUG=none TEST=Saw DEV screen during boot process. Change-Id: I3ed95e133417194ec8e774f42770bc61d879295f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e9628781801943903ba99ba1071aa374c6fc0754 Original-Change-Id: Ifd101f3e08698561d8516d83bc7d502d210e3b66 Original-Signed-off-by: YH Huang <yh.huang@mediatek.com> Original-Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292686 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/13093 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/google/oak/mainboard.c')
-rw-r--r--src/mainboard/google/oak/mainboard.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c
index 8dde2ef186..614c965ae6 100644
--- a/src/mainboard/google/oak/mainboard.c
+++ b/src/mainboard/google/oak/mainboard.c
@@ -67,9 +67,37 @@ static void configure_audio(void)
mt_pll_set_aud_div(48 * KHz);
}
+/* Setup backlight control pins as output pin and power-off by default */
+static void configure_backlight(void)
+{
+ switch (board_id()) {
+ case 0:
+ gpio_output(PAD_DISP_PWM0, 0); /* DISP_PWM0 */
+ mt6391_gpio_output(MT6391_KP_ROW3, 0); /* PANEL_POWER_EN_6397 */
+ break;
+ case 1:
+ case 2:
+ gpio_output(PAD_DISP_PWM0, 0); /* DISP_PWM0 */
+ gpio_output(PAD_PCM_TX, 0); /* PANEL_POWER_EN */
+ break;
+ case 3:
+ gpio_output(PAD_UCTS2, 0); /* PANEL_LCD_POWER_EN */
+ gpio_output(PAD_DISP_PWM0, 0); /* DISP_PWM0 */
+ gpio_output(PAD_PCM_TX, 0); /* PANEL_POWER_EN */
+ break;
+ case 4:
+ default:
+ gpio_output(PAD_SRCLKENAI, 0); /* PANEL_LCD_POWER_EN */
+ gpio_output(PAD_DISP_PWM0, 0); /* DISP_PWM0 */
+ gpio_output(PAD_PCM_TX, 0); /* PANEL_POWER_EN */
+ break;
+ }
+}
+
static void mainboard_init(device_t dev)
{
configure_audio();
+ configure_backlight();
}
static void mainboard_enable(device_t dev)