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authorTristan Shieh <tristan.shieh@mediatek.com>2018-07-04 13:37:39 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-07-11 10:45:48 +0000
commitc645a5aac4c2af002c7748524fbe1f51a64e2300 (patch)
tree99ace67b095563382f7abd2d94a8177fe06073c4 /src/mainboard/google/oak
parent1a26a30a7f8b52635998c0d35e79fa84c513995c (diff)
downloadcoreboot-c645a5aac4c2af002c7748524fbe1f51a64e2300.tar.xz
mediatek: Share MMU operation code among similar SOCs
Refactor MMU operation code which will be reused among similar SOCs. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Elm Change-Id: Id8173da0a02e57e863263fcd89c91a9c089e8a0f Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27349 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/oak')
-rw-r--r--src/mainboard/google/oak/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/oak/romstage.c b/src/mainboard/google/oak/romstage.c
index 1f5654748b..9f5ce5f2df 100644
--- a/src/mainboard/google/oak/romstage.c
+++ b/src/mainboard/google/oak/romstage.c
@@ -63,7 +63,7 @@ void main(void)
else
mt_pll_raise_ca53_freq(1700 * MHz);
- mt8173_mmu_after_dram();
+ mtk_mmu_after_dram();
/* should be called after memory init */
cbmem_initialize_empty();