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authorFurquan Shaikh <furquan@google.com>2018-06-19 08:40:19 -0700
committerFurquan Shaikh <furquan@google.com>2018-06-20 18:28:46 +0000
commitfaad9684a9882c6521913872d39222221e6c871a (patch)
treec824931fc7067859dcb050536f11d4e39ddf30eb /src/mainboard/google/octopus/chromeos.c
parentd4d1ef81893175ef68a377392af6d5b8d1c2d7dc (diff)
downloadcoreboot-faad9684a9882c6521913872d39222221e6c871a.tar.xz
mb/google/octopus: Configure EC_IN_RW correctly
This change fixes the following issues with EC_IN_RW signal: 1. EC_IN_RW is an input signal to the SoC. Configure it accordingly in GPIO table for baseboard and bip. 2. GPIO_EC_IN_RW is passed in coreboot tables so that payload can re-sample the GPIO at runtime. BUG=b:110084012 TEST=Verified that EC_IN_RW signal is read correctly in depthcharge. Change-Id: I1c5f5b4b914ced98e89a571dc398df5ba1fe8460 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27166 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/mainboard/google/octopus/chromeos.c')
-rw-r--r--src/mainboard/google/octopus/chromeos.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/octopus/chromeos.c b/src/mainboard/google/octopus/chromeos.c
index 8e1e1b9b20..5eb3990124 100644
--- a/src/mainboard/google/octopus/chromeos.c
+++ b/src/mainboard/google/octopus/chromeos.c
@@ -29,7 +29,8 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
- {-1, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"},
+ {GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW),
+ "EC in RW"},
};
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
}