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| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2019-09-04 16:14:10 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-05 14:59:38 +0000 |
| commit | 940fb57c06ff706f8e3ab16451548ab93aff1340 (patch) | |
| tree | 4e6af04302ad8d5cd93e27225a2bfab2b1f7481b /src/mainboard/google/octopus/smihandler.c | |
| parent | b89ce2e1b4989557ba70780ceae165734fb17622 (diff) | |
| download | coreboot-940fb57c06ff706f8e3ab16451548ab93aff1340.tar.xz | |
mb/google/drallion: modify PCIE setting
Based on HW schematic to modify PCIE setting.
BUG=b:138082886
BRANCH=N/A
TEST=N/A
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Ia744a6f3cba76c507c1c43b0a981cb6d89c1a40f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35243
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Diffstat (limited to 'src/mainboard/google/octopus/smihandler.c')
0 files changed, 0 insertions, 0 deletions