diff options
author | Marco Chen <marcochen@chromium.org> | 2019-07-10 13:13:45 +0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2019-07-16 16:34:40 +0000 |
commit | af62855ac4aa0fde702b94769f14966609bedb20 (patch) | |
tree | 8f61f91955350c66a441cdb87635fed19f1baba5 /src/mainboard/google/octopus/variants/garg/variant.c | |
parent | 9b0f93347249cf260fe7db0072131277b846cc1a (diff) | |
download | coreboot-af62855ac4aa0fde702b94769f14966609bedb20.tar.xz |
mb/google/octopus/variants/garg: support LTE power sequence
GPIOs related to power sequnce are
GPIO_67 - EN_PP3300
GPIO_117 - FULL_CARD_POWER_ON_OFF
GPIO_161 - PLT_RST_LTE_L
1. Power on: GPIO_67 -> 0ms -> GPIO_117 -> 30ms -> GPIO_161
2. Power off: GPIO_161 -> 30ms -> GPIO_117 -> 100ms -> GPIO_67
3. Power reset:
- keep GPIO_67 and GPIO_117 high and
- pull down GPIO_161 for 30ms then release it.
BUG=b:137033609
BRANCH=octopus
TEST=build image and verify on the DUT with LTE DB.
Change-Id: I7bf6fee087c885c22363b44aa98aa61f91be90b4
Signed-off-by: Marco Chen <marcochen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34188
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/octopus/variants/garg/variant.c')
-rw-r--r-- | src/mainboard/google/octopus/variants/garg/variant.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/garg/variant.c b/src/mainboard/google/octopus/variants/garg/variant.c index a3efe3f802..2754e640f9 100644 --- a/src/mainboard/google/octopus/variants/garg/variant.c +++ b/src/mainboard/google/octopus/variants/garg/variant.c @@ -13,10 +13,13 @@ * GNU General Public License for more details. */ +#include <arch/acpi.h> #include <boardid.h> #include <ec/google/chromeec/ec.h> #include <drivers/intel/gma/opregion.h> #include <baseboard/variants.h> +#include <delay.h> +#include <gpio.h> enum { SKU_1_2A2C = 1, @@ -24,6 +27,34 @@ enum { SKU_17_LTE = 17, }; +struct gpio_with_delay { + gpio_t gpio; + unsigned int delay_msecs; +}; + +static void power_off_lte_module(u8 slp_typ) +{ + const struct gpio_with_delay lte_power_off_gpios[] = { + { + GPIO_161, /* AVS_I2S1_MCLK -- PLT_RST_LTE_L */ + 30, + }, + { + GPIO_117, /* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */ + 100 + }, + { + GPIO_67, /* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */ + 0 + } + }; + + for (int i = 0; i < ARRAY_SIZE(lte_power_off_gpios); i++) { + gpio_output(lte_power_off_gpios[i].gpio, 0); + mdelay(lte_power_off_gpios[i].delay_msecs); + } +} + const char *mainboard_vbt_filename(void) { uint32_t sku_id; @@ -37,3 +68,19 @@ const char *mainboard_vbt_filename(void) return "vbt.bin"; } } + +void variant_smi_sleep(u8 slp_typ) +{ + /* Currently use cases here all target to S5 therefore we do early return + * here for saving one transaction to the EC for getting SKU ID. */ + if (slp_typ != ACPI_S5) + return; + + switch (get_board_sku()) { + case SKU_17_LTE: + power_off_lte_module(slp_typ); + return; + default: + return; + } +} |