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author | Subrata Banik <subrata.banik@intel.com> | 2020-08-30 13:51:44 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2020-09-01 03:06:04 +0000 |
commit | 8e6d5f2937c169914e46b5ebc973e5df5e4290a7 (patch) | |
tree | 1550c8877877a7a9b197da65bcff76f878bee560 /src/mainboard/google/octopus/variants | |
parent | b7a68d5b05259a07a84a546e6a7e40948ba705ac (diff) | |
download | coreboot-8e6d5f2937c169914e46b5ebc973e5df5e4290a7.tar.xz |
{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent
Convert 0X -> 0x
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: Iea3ca67908135d0e85083a05bad2ea176ca34095
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44926
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/google/octopus/variants')
-rw-r--r-- | src/mainboard/google/octopus/variants/baseboard/devicetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index ea5325a57e..9ac02fd4a4 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -273,8 +273,8 @@ chip soc/intel/apollolake # RegOrValue (15:8): 0x2 and RegAndValue (7:0) 0xF8. # The register is defined as: D[7:3] RSVD, D[2:0] PWROKDELAY. # uint8 RegOrValue, RegAndValue, PmicReadReg - # RegOrValue = (UINT8)((PmicPmcIpcCtrl >> 8) & 0Xff); - # RegAndValue = (UINT8)(PmicPmcIpcCtrl & 0Xff); + # RegOrValue = (UINT8)((PmicPmcIpcCtrl >> 8) & 0xff); + # RegAndValue = (UINT8)(PmicPmcIpcCtrl & 0xff); # PmicReadReg &= RegAndValue; # PmicReadReg |= RegOrValue; # PmicReadReg value will be programmed into PMIC D[2:0] PWROKDELAY field |