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| author | Shaunak Saha <shaunak.saha@intel.com> | 2018-03-21 08:34:17 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-03-26 10:19:34 +0000 |
| commit | ea5c0a15abcc7fda2f95b83a40ab3bd879ae2f0b (patch) | |
| tree | 3ad15becad6cc50ef4c3ef7a91fac064200be299 /src/mainboard/google/octopus | |
| parent | f595ba2a9eaa5a80ec09f7003d5328ee78b80353 (diff) | |
| download | coreboot-ea5c0a15abcc7fda2f95b83a40ab3bd879ae2f0b.tar.xz | |
mb/octopus: Set PNP config to PNP_PERF_POWER
This patch sets the PNP config value to PNP_PERF_POWER.
The config values for soc can be found in chip.h
TEST = Build for octopus.
Change-Id: I2239aa70cb708e6e1c06339ca9d517e7eaa198ed
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/25310
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/octopus')
| -rw-r--r-- | src/mainboard/google/octopus/variants/baseboard/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index fb8fe540c9..a19d2475e7 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -122,6 +122,8 @@ chip soc/intel/apollolake .early_init = 1, }" + register "pnp_settings" = "PNP_PERF_POWER" + device domain 0 on device pci 00.0 on end # - Host Bridge device pci 00.1 on end # - DPTF |