diff options
| author | John Su <john_su@compal.corp-partner.google.com> | 2018-10-16 14:50:45 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-24 09:57:58 +0000 |
| commit | 75a7862c472e5a38d4c767f67ffbb669122a3054 (patch) | |
| tree | f1f394af32f686f4ac4ba49f4678869e77b84d5a /src/mainboard/google/octopus | |
| parent | 6d2f7d24efc22b055d15f430f4c595d812eeb6a5 (diff) | |
| download | coreboot-75a7862c472e5a38d4c767f67ffbb669122a3054.tar.xz | |
mb/google/octopus/variants/fleex: Update DPTF parameters
1. Update PSV values for cpu and sensers.
2. Change PL1 min value from 3w to 4.5w.
3. Change TSR2 TRT source from charger to CPU.
Refer to 112448519#comment31.
BUG=b:112448519
TEST=Build coreboot for Octopus board
Change-Id: I7c7df0f54374fdaa4cf57d5c255d841d7db38cfc
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/29146
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/mainboard/google/octopus')
| -rw-r--r-- | src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl b/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl index d72b4d0330..d5943c7e41 100644 --- a/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl @@ -13,21 +13,19 @@ * GNU General Public License for more details. */ -#define DPTF_CPU_PASSIVE 90 +#define DPTF_CPU_PASSIVE 100 #define DPTF_CPU_CRITICAL 127 #define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "Ambient" -#define DPTF_TSR1_PASSIVE 90 +#define DPTF_TSR1_PASSIVE 57 #define DPTF_TSR1_CRITICAL 127 #define DPTF_TSR2_SENSOR_ID 2 #define DPTF_TSR2_SENSOR_NAME "Charger" -#define DPTF_TSR2_PASSIVE 90 +#define DPTF_TSR2_PASSIVE 53 #define DPTF_TSR2_CRITICAL 127 -#define DPTF_ENABLE_CHARGER - /* Charger performance states, board-specific values from charger and EC */ Name (CHPS, Package () { Package () { 0, 0, 0, 0, 255, 0xBB8, "mA", 0 }, /* 3A (MAX) */ @@ -44,10 +42,8 @@ Name (DTRT, Package () { /* CPU Effect on Temp Sensor 1 */ Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 150, 0, 0, 0, 0 }, -#ifdef DPTF_ENABLE_CHARGER - /* Charger Effect on Temp Sensor 2 */ - Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 200, 300, 0, 0, 0, 0 }, -#endif + /* CPU Effect on Temp Sensor 2 */ + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 200, 300, 0, 0, 0, 0 }, }) Name (MPPC, Package () @@ -55,7 +51,7 @@ Name (MPPC, Package () 0x2, /* Revision */ Package () { /* Power Limit 1 */ 0, /* PowerLimitIndex, 0 for Power Limit 1 */ - 3000, /* PowerLimitMinimum */ + 4500, /* PowerLimitMinimum */ 10000, /* PowerLimitMaximum */ 1000, /* TimeWindowMinimum */ 1000, /* TimeWindowMaximum */ |