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authorMohammed Habibulla <moch@chromium.org>2013-10-29 11:02:30 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2014-07-12 20:16:45 +0200
commitf0790e4e513203d962c000559dcb842202da3815 (patch)
tree8ce0772b1cd52e325b79c6fef18cce5de96bf6a7 /src/mainboard/google/panther
parent0fccebb5d9d6b888048cd0e3bdbba857f2ba21f8 (diff)
downloadcoreboot-f0790e4e513203d962c000559dcb842202da3815.tar.xz
google/panther: Fix thermal zone to use SIO PWM/TACH port 2
Fan is attached to port 2 instead of 3. (panther port of I9878063a24b0b908c74522580f776a4ce7d03d75) BUG=chrome-os-partner:23563 TEST=none BRANCH=panther Change-Id: I028e0e5a748fa0a20d34e27e870e14ed8c75e4d1 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/174984 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Mohammed Habibulla <moch@chromium.org> Tested-by: Mohammed Habibulla <moch@chromium.org> Reviewed-on: http://review.coreboot.org/5991 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/google/panther')
-rw-r--r--src/mainboard/google/panther/acpi/thermal.asl20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/google/panther/acpi/thermal.asl b/src/mainboard/google/panther/acpi/thermal.asl
index d96d955bbc..d5b1290b94 100644
--- a/src/mainboard/google/panther/acpi/thermal.asl
+++ b/src/mainboard/google/panther/acpi/thermal.asl
@@ -141,12 +141,12 @@ Scope (\_TZ)
}
Method (_ON) {
Store (0, \FLVL)
- Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (1, \FLVL)
- Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
}
@@ -162,12 +162,12 @@ Scope (\_TZ)
}
Method (_ON) {
Store (1, \FLVL)
- Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (2, \FLVL)
- Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
}
@@ -183,12 +183,12 @@ Scope (\_TZ)
}
Method (_ON) {
Store (2, \FLVL)
- Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (3, \FLVL)
- Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
}
@@ -204,12 +204,12 @@ Scope (\_TZ)
}
Method (_ON) {
Store (3, \FLVL)
- Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
}
@@ -225,12 +225,12 @@ Scope (\_TZ)
}
Method (_ON) {
Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (4, \FLVL)
- Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
+ Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS)
Notify (\_TZ.THRM, 0x81)
}
}