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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-12-11 16:00:47 -0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-12-12 06:03:06 +0100 |
| commit | a7198b34ccf120df2a9e5b9f104812e96916ad08 (patch) | |
| tree | e2d6f704f4f9d1a5b1060febe4c9463d8811fc24 /src/mainboard/google/parrot/dsdt.asl | |
| parent | 0e81b62638bbc7ee1731034dd041f9756a5bd0fb (diff) | |
| download | coreboot-a7198b34ccf120df2a9e5b9f104812e96916ad08.tar.xz | |
Add support for Google Parrot Chromebook
AKA Acer C7 Chromebook
See http://www.google.com/intl/en/chrome/devices/acer-c7-chromebook.html
for more information. Thank you to Sage Electronic Engineering, LLC for
making this possible! http://www.se-eng.com/
Change-Id: Ic4e4d50045a82cbb82e1dea3cd5a04525a648612
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2026
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/google/parrot/dsdt.asl')
| -rw-r--r-- | src/mainboard/google/parrot/dsdt.asl | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/src/mainboard/google/parrot/dsdt.asl b/src/mainboard/google/parrot/dsdt.asl new file mode 100644 index 0000000000..608827aac1 --- /dev/null +++ b/src/mainboard/google/parrot/dsdt.asl @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, // DSDT revision: ACPI v2.0 + "COREv4", // OEM id + "COREBOOT", // OEM table id + 0x20110725 // OEM revision +) +{ + // Some generic macros + #include "acpi/platform.asl" + #include "acpi/mainboard.asl" + + // global NVS and variables + #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> + + // General Purpose Events + //#include "acpi/gpe.asl" + + #include "acpi/thermal.asl" + + #include <cpu/intel/model_206ax/acpi/cpu.asl> + + Scope (\_SB) { + Device (PCI0) + { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + } + } + + #include "acpi/chromeos.asl" + #include <vendorcode/google/chromeos/acpi/chromeos.asl> + + /* Chipset specific sleep states */ + #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> +} |