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authorMartin Roth <martin@coreboot.org>2019-10-23 21:41:43 -0600
committerMartin Roth <martinroth@google.com>2019-10-27 21:08:49 +0000
commitad0f4853619b1c239b8ace7554958c6b4932c04f (patch)
tree30aab33490fa6d6dacc17a0f1bac99f0554c8ea5 /src/mainboard/google/peach_pit
parent38ddbfb325866716c9c65a460e388f33d1a773dd (diff)
downloadcoreboot-ad0f4853619b1c239b8ace7554958c6b4932c04f.tar.xz
src/mainboard: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I46d131f76ec930d2ef0f74e6eaabae067df10754 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36330 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/google/peach_pit')
-rw-r--r--src/mainboard/google/peach_pit/mainboard.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/peach_pit/mainboard.c b/src/mainboard/google/peach_pit/mainboard.c
index ecd2260511..234a433acb 100644
--- a/src/mainboard/google/peach_pit/mainboard.c
+++ b/src/mainboard/google/peach_pit/mainboard.c
@@ -465,9 +465,9 @@ static void mainboard_enable(struct device *dev)
mmu_config_range((uintptr_t)_dma_coherent/MiB,
REGION_SIZE(dma_coherent)/MiB, DCACHE_OFF);
- const unsigned epll_hz = 192000000;
- const unsigned sample_rate = 48000;
- const unsigned lr_frame_size = 256;
+ const unsigned int epll_hz = 192000000;
+ const unsigned int sample_rate = 48000;
+ const unsigned int lr_frame_size = 256;
clock_epll_set_rate(epll_hz);
clock_select_i2s_clk_source();
clock_set_i2s_clk_prescaler(epll_hz, sample_rate * lr_frame_size);