diff options
author | Aaron Durbin <adurbin@chromium.org> | 2015-03-17 13:25:19 -0500 |
---|---|---|
committer | Aaron Durbin <adurbin@google.com> | 2015-03-20 19:28:25 +0100 |
commit | e4f3e7a9c656356a92e827d5a39b85106cbdaf3a (patch) | |
tree | 885e9fefb1a8ea6802b6df56fdcadcd435c5f5cd /src/mainboard/google/peach_pit | |
parent | d1b0e87179ca42eadbfb36191171e0e8552c1cbe (diff) | |
download | coreboot-e4f3e7a9c656356a92e827d5a39b85106cbdaf3a.tar.xz |
romstages: use common run_ramstage()
Instead of sprinkling the cbfs calls around (as well as getting
return values incorrect) use the common run_ramstage() to perform
the necessary work to load and run ramstage.
Change-Id: I37b1e94be36ef7a43efe65b2db110742fa105169
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8710
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/peach_pit')
-rw-r--r-- | src/mainboard/google/peach_pit/romstage.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c index ce4e399626..04be804b05 100644 --- a/src/mainboard/google/peach_pit/romstage.c +++ b/src/mainboard/google/peach_pit/romstage.c @@ -38,7 +38,7 @@ #include <soc/samsung/exynos5420/trustzone.h> #include <soc/samsung/exynos5420/wakeup.h> #include <console/console.h> -#include <arch/stages.h> +#include <program_loading.h> #include <drivers/maxim/max77802/max77802.h> #include <device/i2c.h> @@ -228,7 +228,6 @@ void main(void) { extern struct mem_timings mem_timings; - void *entry; int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP); int power_init_failed; @@ -278,10 +277,9 @@ void main(void) cbmem_initialize_empty(); - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage"); simple_spi_test(); timestamp_add_now(TS_END_ROMSTAGE); - stage_exit(entry); + run_ramstage(); } |