diff options
author | David Hendricks <dhendrix@chromium.org> | 2013-06-14 16:08:05 -0700 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 22:35:42 +0200 |
commit | 1e3e2c51dba9b2c205985704aec77c89fcda7fdc (patch) | |
tree | 534b051d031860469e039c7d8ccebf1f5e5228c9 /src/mainboard/google/pit | |
parent | 90a42d83cf27afb24c832811995b399955cc3008 (diff) | |
download | coreboot-1e3e2c51dba9b2c205985704aec77c89fcda7fdc.tar.xz |
pit: set up the PMIC correctly
This updates the setup_power() function to actually set up the PMIC
which is on this board (the MAX77802).
Change-Id: I9c6f21f183dacc0bca71277e681e670834412d78
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3680
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/pit')
-rw-r--r-- | src/mainboard/google/pit/exynos5420.h | 1 | ||||
-rw-r--r-- | src/mainboard/google/pit/romstage.c | 92 |
2 files changed, 54 insertions, 39 deletions
diff --git a/src/mainboard/google/pit/exynos5420.h b/src/mainboard/google/pit/exynos5420.h index 98d36f92e4..562d9bce66 100644 --- a/src/mainboard/google/pit/exynos5420.h +++ b/src/mainboard/google/pit/exynos5420.h @@ -19,6 +19,7 @@ /* I2C */ #define I2C_0_SPEED 100000 +#define I2C_4_SPEED 100000 #define I2C_SLAVE 0 /* Voltages */ diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c index 1ff8d51de2..001d8cf24e 100644 --- a/src/mainboard/google/pit/romstage.c +++ b/src/mainboard/google/pit/romstage.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved. + * Copyright 2013 Google Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,6 +18,7 @@ */ #include <types.h> +#include <stdlib.h> #include <armv7.h> #include <cbfs.h> @@ -35,60 +36,73 @@ #include <console/console.h> #include <arch/stages.h> -#include <drivers/maxim/max77686/max77686.h> +#include <drivers/maxim/max77802/max77802.h> #include <device/i2c.h> #include "exynos5420.h" -#define PMIC_BUS 0 #define MMC0_GPIO_PIN (58) +struct pmic_write +{ + int or_orig; // Whether to or in the original value. + uint8_t reg; // Register to write. + uint8_t val; // Value to write. +}; + +/* + * Use read-modify-write for MAX77802 control registers and clobber the + * output voltage setting (BUCK?DVS?) registers. + */ +struct pmic_write pmic_writes[] = +{ + { 1, MAX77802_REG_PMIC_32KHZ, MAX77802_32KHCP_EN }, + { 0, MAX77802_REG_PMIC_BUCK1DVS1, MAX77802_BUCK1DVS1_1V }, + { 1, MAX77802_REG_PMIC_BUCK1CTRL, MAX77802_BUCK_TYPE1_ON | + MAX77802_BUCK_TYPE1_IGNORE_PWRREQ }, + { 0, MAX77802_REG_PMIC_BUCK2DVS1, MAX77802_BUCK2DVS1_1V }, + { 1, MAX77802_REG_PMIC_BUCK2CTRL1, MAX77802_BUCK_TYPE2_ON | + MAX77802_BUCK_TYPE2_IGNORE_PWRREQ }, + { 0, MAX77802_REG_PMIC_BUCK3DVS1, MAX77802_BUCK3DVS1_1V }, + { 1, MAX77802_REG_PMIC_BUCK3CTRL1, MAX77802_BUCK_TYPE2_ON | + MAX77802_BUCK_TYPE2_IGNORE_PWRREQ }, + { 0, MAX77802_REG_PMIC_BUCK4DVS1, MAX77802_BUCK4DVS1_1V }, + { 1, MAX77802_REG_PMIC_BUCK4CTRL1, MAX77802_BUCK_TYPE2_ON | + MAX77802_BUCK_TYPE2_IGNORE_PWRREQ }, + { 0, MAX77802_REG_PMIC_BUCK6DVS1, MAX77802_BUCK6DVS1_1V }, + { 1, MAX77802_REG_PMIC_BUCK6CTRL, MAX77802_BUCK_TYPE1_ON | + MAX77802_BUCK_TYPE1_IGNORE_PWRREQ } +}; + static void setup_power(void) { int error = 0; + int i; power_init(); /* Initialize I2C bus to configure PMIC. */ - exynos_pinmux_i2c0(); - i2c_init(0, I2C_0_SPEED, 0x00); + exynos_pinmux_i2c4(); + i2c_init(4, I2C_4_SPEED, 0x00); printk(BIOS_DEBUG, "%s: Setting up PMIC...\n", __func__); - /* - * We're using CR1616 coin cell battery that is non-rechargeable - * battery. But, BBCHOSTEN bit of the BBAT Charger Register in - * MAX77686 is enabled by default for charging coin cell. - * - * Also, we cannot meet the coin cell reverse current spec. in UL - * standard if BBCHOSTEN bit is enabled. - * - * Disable Coin BATT Charging - */ - error = max77686_disable_backup_batt(PMIC_BUS); - - error |= max77686_volsetting(PMIC_BUS, PMIC_BUCK2, VDD_ARM_MV, - REG_ENABLE, MAX77686_MV); - error |= max77686_volsetting(PMIC_BUS, PMIC_BUCK3, VDD_INT_UV, - REG_ENABLE, MAX77686_UV); - error |= max77686_volsetting(PMIC_BUS, PMIC_BUCK1, VDD_MIF_MV, - REG_ENABLE, MAX77686_MV); - error |= max77686_volsetting(PMIC_BUS, PMIC_BUCK4, VDD_G3D_MV, - REG_ENABLE, MAX77686_MV); - error |= max77686_volsetting(PMIC_BUS, PMIC_LDO2, VDD_LDO2_MV, - REG_ENABLE, MAX77686_MV); - error |= max77686_volsetting(PMIC_BUS, PMIC_LDO3, VDD_LDO3_MV, - REG_ENABLE, MAX77686_MV); - error |= max77686_volsetting(PMIC_BUS, PMIC_LDO5, VDD_LDO5_MV, - REG_ENABLE, MAX77686_MV); - error |= max77686_volsetting(PMIC_BUS, PMIC_LDO10, VDD_LDO10_MV, - REG_ENABLE, MAX77686_MV); - - error |= max77686_enable_32khz_cp(PMIC_BUS); - - if (error) { - printk(BIOS_CRIT, "%s: PMIC error: %#x\n", __func__, error); - die("Failed to intialize PMIC.\n"); + + for (i = 0; i < ARRAY_SIZE(pmic_writes); i++) { + uint8_t data = 0; + uint8_t reg = pmic_writes[i].reg; + + if (pmic_writes[i].or_orig) + error |= i2c_read(4, MAX77802_I2C_ADDR, + reg, sizeof(reg), + &data, sizeof(data)); + data |= pmic_writes[i].val; + error |= i2c_write(4, MAX77802_I2C_ADDR, + reg, sizeof(reg), + &data, sizeof(data)); } + + if (error) + die("Failed to intialize PMIC.\n"); } static void setup_storage(void) |