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| author | Hung-Te Lin <hungte@chromium.org> | 2013-06-26 19:48:43 +0800 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-07-10 23:18:23 +0200 |
| commit | 2b3167908be680b5aa1cd6fe2f42a44d4c118f3f (patch) | |
| tree | 67f3ac5ab3605a465898758a9a454ae75f970463 /src/mainboard/google/pit | |
| parent | f473df141956d639ccc9e2ad8c60b313294d6e8d (diff) | |
| download | coreboot-2b3167908be680b5aa1cd6fe2f42a44d4c118f3f.tar.xz | |
armv7/pit: Correct EC device in mainboard configuration.
The ChromeOS EC for peach_pit is connected to SPI2 bus, not I2C.
Change-Id: Ifeb8a626aa4fc3d3a181a7bc016e3f91be948ae5
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3716
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/pit')
| -rw-r--r-- | src/mainboard/google/pit/Kconfig | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/pit/Kconfig b/src/mainboard/google/pit/Kconfig index 4148101108..20e0084eb1 100644 --- a/src/mainboard/google/pit/Kconfig +++ b/src/mainboard/google/pit/Kconfig @@ -25,7 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CPU_SAMSUNG_EXYNOS5420 select HAVE_UART_MEMORY_MAPPED select EC_GOOGLE_CHROMEEC - select EC_GOOGLE_CHROMEEC_I2C + select EC_GOOGLE_CHROMEEC_SPI select BOARD_ROMSIZE_KB_4096 select CHROMEOS select MAINBOARD_HAS_NATIVE_VGA_INIT @@ -44,8 +44,8 @@ config DRAM_SIZE_MB int default 2048 -config EC_GOOGLE_CHROMEEC_I2C_BUS +config EC_GOOGLE_CHROMEEC_SPI_BUS hex - default 4 + default 2 endif # BOARD_GOOGLE_PIT |